From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 506CE2405EC for ; Mon, 1 Dec 2025 23:15:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764630943; cv=none; b=GSoTZBL4QIzqx5M87EYuepW5yZDPIvIkqIW1cW7b3YlBL943lRwIe/y6LLMdE9oLddmvx6k1+MCeZqlOL2PV+JPNz4heof9Vz8yw8OkJ7NueUW0hcgS41hRHb51YLYoQ/sdJz11gYucX9RS+oWr9MiEVwx0+X3WVerUQC/NJoLg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764630943; c=relaxed/simple; bh=LMa+tlRhR49+mOaxDcSj3uDv9DxKlc+5Nw3vVv2oJYk=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=AoBq1DONHWDbXSDE41qzlQIWZaK55U07DyBlEa7ZLk5veqgO3tRy1pDNHPoSszUtIrV6JSiX+hl1qCGseormAFiKWSj0XkysDvsbUZydu0rwtfUH/SwB75UUOhmJe7uM6ryAfmtVd900WQw4ZVJk/0Q7IZxXqBWmvy7+uObs5gk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Zyeut5PJ; arc=none smtp.client-ip=198.175.65.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Zyeut5PJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1764630942; x=1796166942; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=LMa+tlRhR49+mOaxDcSj3uDv9DxKlc+5Nw3vVv2oJYk=; b=Zyeut5PJJIKEiQbf4f2dj57FaQihVXml9XeeLXQpMox4OtBgBiKqEuZu zp2ZBu1jN5trddmGORRM5LTvw6xbrXFV16ny42YRRncMF5cgR2fOx7KKv E5vt4GJYh226nzY6KLYU7VmFjybBpEMIWKdQJyTdTQfll1Peu8CM9zMm4 3qgaCuL5FOCV4sWpggL7tNTXN7MqDBhOXekedSE7bFAX7KF4vgHeK6lIY WbQPf/bRH8XfLLdhp9CRCt7qbPjszDJHaP8Jqr7glUumrWWm4YODv0G1C Gojx1l8d8LktEAy77U4UyJZ8OW2ixtA83nyff69PlaMLjz2YlyABM7KLT w==; X-CSE-ConnectionGUID: SRpibCLMQ2mFan9jUkUEYA== X-CSE-MsgGUID: Xi17zFu+S8+jgyRh+Cd/sQ== X-IronPort-AV: E=McAfee;i="6800,10657,11630"; a="66623508" X-IronPort-AV: E=Sophos;i="6.20,241,1758610800"; d="scan'208";a="66623508" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Dec 2025 15:15:41 -0800 X-CSE-ConnectionGUID: scfYmvFuTWGb8Xdbm703wQ== X-CSE-MsgGUID: h8jVpRysRpqeXlbwlDk+wA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.20,241,1758610800"; d="scan'208";a="193878008" Received: from smtp.ostc.intel.com ([10.54.29.231]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Dec 2025 15:15:40 -0800 Received: from ray2.sr71.net (unknown [10.125.111.117]) by smtp.ostc.intel.com (Postfix) with ESMTP id 3979A6362; Mon, 1 Dec 2025 15:15:40 -0800 (PST) From: Dave Hansen To: torvalds@linux-foundation.org Cc: x86@kernel.org, linux-kernel@vger.kernel.org, Dave Hansen Subject: [GIT PULL] x86/cpu for 6.19-rc1 Date: Mon, 1 Dec 2025 15:15:37 -0800 Message-Id: <20251201231537.736899-1-dave.hansen@linux.intel.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi Linus, Please pull some x86/cpu changes for 6.19-rc1. The biggest thing of note here is Linear Address Space Separation (LASS). It represents the first time I can think of that the upper=>kernel/lower=>user address space convention is actually recognized by the hardware on x86. It ensures that userspace can not even get the hardware to _start_ page walks for the kernel address space. This, of course, is a really nice generic side channel defense. This is really only a down payment on LASS support. There are still some details to work out in its interaction with EFI calls and vsyscall emulation. For now, LASS is disabled if either of those features is compiled in (which is almost always the case). There's also one straggler commit in here which converts an under-utilized AMD CPU feature leaf into a generic Linux-defined leaf so more feature can be packed in there. -- The following changes since commit 3a8660878839faadb4f1a6dd72c3179c1df56787: Linux 6.18-rc1 (2025-10-12 13:42:36 -0700) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git tags/x86_cpu_for_6.19-rc1 for you to fetch changes up to d5cb9574391cc0a4683c22944d00d0ad76a224d3: x86/cpu: Enable LASS during CPU initialization (2025-11-18 10:38:27 -0800) ---------------------------------------------------------------- * Enable Linear Address Space Separation (LASS) * Change X86_FEATURE leaf 17 from an AMD leaf to Linux-defined ---------------------------------------------------------------- Alexander Shishkin (1): x86/traps: Communicate a LASS violation in #GP message Borislav Petkov (AMD) (1): x86/cpufeatures: Make X86_FEATURE leaf 17 Linux-specific Peter Zijlstra (Intel) (1): x86/asm: Introduce inline memcpy and memset Sohil Mehta (6): x86/cpufeatures: Enumerate the LASS feature bits x86/cpu: Add an LASS dependency on SMAP x86/alternatives: Disable LASS when patching kernel code x86/kexec: Disable LASS during relocate kernel selftests/x86: Update the negative vsyscall tests to expect a #GP x86/cpu: Enable LASS during CPU initialization arch/x86/Kconfig.cpufeatures | 4 +++ arch/x86/include/asm/cpufeature.h | 2 +- arch/x86/include/asm/cpufeatures.h | 6 +++- arch/x86/include/asm/smap.h | 41 +++++++++++++++++++++++++-- arch/x86/include/asm/string.h | 26 +++++++++++++++++ arch/x86/include/uapi/asm/processor-flags.h | 2 ++ arch/x86/kernel/alternative.c | 18 ++++++++++-- arch/x86/kernel/cpu/common.c | 32 ++++++++++++++++----- arch/x86/kernel/cpu/cpuid-deps.c | 1 + arch/x86/kernel/cpu/scattered.c | 3 ++ arch/x86/kernel/relocate_kernel_64.S | 7 +++-- arch/x86/kernel/traps.c | 44 +++++++++++++++++++++-------- arch/x86/kvm/reverse_cpuid.h | 1 - tools/arch/x86/include/asm/cpufeatures.h | 5 +++- tools/testing/selftests/x86/test_vsyscall.c | 21 ++++++++------ 15 files changed, 176 insertions(+), 37 deletions(-)