From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f45.google.com (mail-pj1-f45.google.com [209.85.216.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 62F7C2FDC29 for ; Tue, 2 Dec 2025 07:43:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.45 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764661401; cv=none; b=VxkKK80WLDyEel0tqGX+S6lxeCJOv3vlzGtNOZ7r0Vi0bmgTLKjhJm8TbiCzcSKFRJdK2WbIpxyYhDhwGe4ck1nsFSqCakq8MudTbw5gbbLZkifpDvtO9kMHV1uyghRDBQJgtcsWxjC+o7faH4CtOcXILgDaAjNZtQ3saPc5Ilg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764661401; c=relaxed/simple; bh=GExVcmkNuMSxkAcpXaPIMO5ucdvdwdQwxE8DxF5/y/o=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QmjPF89UN4TbrGEeKhAo6COIdv0VpcYBC22Iod1duM8jFmVn7K8cQbKWRPrOpk+4XZnyfY26xO0+K7QPMTdlua6CdThhqTpzlNnFosyAkJrid8qvCPZSEb2q7Bo4sLI3V/lph9kaP9Ihfb2ek4V/HnlarvCP+mlWjX6fghS+nvs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=aWhfh7MO; arc=none smtp.client-ip=209.85.216.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="aWhfh7MO" Received: by mail-pj1-f45.google.com with SMTP id 98e67ed59e1d1-340ba29d518so3398911a91.3 for ; Mon, 01 Dec 2025 23:43:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1764661399; x=1765266199; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pBd9BwWwLOtb87b8vEGnn6NykfJI6TmYweOHyqv4TVo=; b=aWhfh7MO3u4QIdwf8gMiFbcfa0yR1VNm2Mw9xL5mj/p9pyU2TYOKj1qqqB2ylvUbHy iwlYS9H1PB39/ixqgUr4QSRfTioQkvvBRq+3Z2pyfEQfjXJi3u3Sw/vYkoRVHp0wAm+7 J/loScKJ0PyOxvv7XFXoP7JKFY1wcm9lQ6M+/SaJGYb7nKtJsVCYoM68Ba1UwkVmDSzb UE89mUCH7TFvGcGiBtJuouuh4OJMZN/7qX3XTElCgHNnyxIEh3m58MhPoBTiDuTlEHIQ FZrNDdhNppHRSnZ3+LNtGi81ZgYVkfUFN8iZfsk/gomDR2E1vTBqrr9wged/H3tTV2Os WRxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764661399; x=1765266199; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=pBd9BwWwLOtb87b8vEGnn6NykfJI6TmYweOHyqv4TVo=; b=oSd9uoByH9y6vBAfNqgLLqVQh87AMDCdvwSnhMpn1oS5NFWKWTNW1VeDWTcdU10VX2 iqTU7p5btPObRL3xUC9dmFKqJ/L/f3keNvjnsBBqfZCQwg8lC4/gpEnjroUNeynqox+o t6cyJOh9yDeiEnlnw2MtdtREFbYhjef9AA8O86wXLskdUqXmGdfZ5u66xDMZNpn1hSp5 pL2QJPmbv4wZQ0ZJQa9y/XW3j7/9ISYM9/AM/CyOM4jXdihVxNkYXUi6q1njOGyusQTt H7eWz8elUM5295LvSg1TCCfwkxX7orb6rIGL5pnQiPoUBLwMN6Np279pV5ujFc1+dNSM WVTQ== X-Forwarded-Encrypted: i=1; AJvYcCV99mR+x+lEZBMiWbXhLWlYR73emvhUiUnrgGt/ecYUJiXmaBLFr4+69PvoSxp7pvtzOyLb4B7NYuImv08=@vger.kernel.org X-Gm-Message-State: AOJu0YxYzkcvtBMoItn0UU+gtiYgSiRJ3cStOKpzbWc3OsDAtNfl40Re qWlOMeaRgzBQLE3RSql2FdGSG2ffQ8kp7ANi/ZvuBSua4u9mCsQCJTBXmOX9Pg== X-Gm-Gg: ASbGncvwaNARIZp7FuYblfvMrLmjT0P5w2lnNlEVkKWxdeUPpU+QUHftnqmPfcoF892 1asN0Kb50krR2BOPH+F3igPDKNO18r79nseZHlWt1ENR0JfDhnJtMPobQYiEspEU90RVfDTNDEy I0i8+PoE5qRq1qbNG8FouhIro2e6j72ielCMT2uMnENIJiVyeVNvg0aToWUpmroiyLloC53d17O RCVptl2ZC1IEkqOCT5PnetCNYlMJPmkJIhZoX8C9rCb6IEDHpe0NEijzeIUD6GMqevSxsGWRIA8 E6D1GFik7DaW5dDvMLMUJymEgAVn3uNsRyvLFLmQgxV/pZplmrYobm8JK4jX+jwaZTT12oih7eK FgpadZ2oKWIN/f8+ZTIBb7PdFJJ9v7QotiLKZ6PJXrRGxu/Nif0vhoYN8UWAHCRhs6Wt+UNpNGX TSEzTAwoiVwF0z7G9WPbfj3jK+JAfRu6WZBA== X-Google-Smtp-Source: AGHT+IFrlFSV77n2Dp3icOO6zNp8ytkui7d+vABxucFXkOZfq8IJOEJqna8rbLuitdLat5iGksWS4A== X-Received: by 2002:a17:90b:4a88:b0:340:2f48:b51a with SMTP id 98e67ed59e1d1-3475ec0dc4fmr31314229a91.15.1764661398451; Mon, 01 Dec 2025 23:43:18 -0800 (PST) Received: from mao-OptiPlex-3050.hz.ali.com ([47.246.101.226]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3476a7c2ce5sm18970545a91.14.2025.12.01.23.43.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Dec 2025 23:43:18 -0800 (PST) From: maohan4761@gmail.com To: pjw@kernel.org, palmer@dabbelt.com Cc: guoren@kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Mao Han Subject: [PATCH 1/1] riscv: Optimize signal handling with sum enabled accesses Date: Tue, 2 Dec 2025 15:43:03 +0800 Message-Id: <20251202074303.81485-2-maohan4761@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202074303.81485-1-maohan4761@gmail.com> References: <20251202074303.81485-1-maohan4761@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Mao Han Introduce new __get_user_sum_enabled() and __put_user_sum_enabled() macros in uaccess.h that perform user-space accesses assuming the SUM bit is already enabled. Explicitly manage SUM state around bulk user copies in rt_sigreturn() and setup_rt_frame() by bracketing sequences of SUM-enabled operations with a single pair of __enable_user_access() / __disable_user_access(), reducing the number of CSR writes and improving performance. All callers ensure access_ok() checks are performed for the signal frame. Signed-off-by: Mao Han --- arch/riscv/include/asm/uaccess.h | 75 ++++++++++++++++++++++++++++++++ arch/riscv/kernel/signal.c | 74 +++++++++++++++++++------------ 2 files changed, 121 insertions(+), 28 deletions(-) diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h index f5f4f7f..78f8a21 100644 --- a/arch/riscv/include/asm/uaccess.h +++ b/arch/riscv/include/asm/uaccess.h @@ -213,6 +213,43 @@ __gu_failed: \ err = -EFAULT; \ } while (0) +/** + * __get_user_sum_enabled - Get a simple variable from user space, + * assuming user access is already enabled (SUM bit enabled). + * @x: Variable to store result. + * @ptr: Source address, in user space. + * + * Context: User context only. This macro does NOT sleep. + * + * This variant of __get_user assumes that the CPU is already in a state + * where user-space addresses can be accessed directly from kernel mode. + * Therefore, it omits the __enable_user_access() / __disable_user_access() + * calls. + * + * @ptr must have pointer-to-simple-variable type, and the result of + * dereferencing @ptr must be assignable to @x without a cast. + * + * Caller MUST ensure: + * - access_ok(ptr, sizeof(*ptr)) has been verified. + * - The execution context permits direct user-space reads. + * + * Returns zero on success, or -EFAULT on error. + * On error, the variable @x is set to zero. + */ +#define __get_user_sum_enabled(x, ptr) \ +({ \ + const __typeof__(*(ptr)) __user *__gu_ptr = untagged_addr(ptr); \ + long __gu_err = 0; \ + __typeof__(x) __gu_val = (__typeof__(x))0; \ + \ + __chk_user_ptr(__gu_ptr); \ + \ + __get_user_error(__gu_val, __gu_ptr, __gu_err); \ + \ + (x) = __gu_val; \ + __gu_err; \ +}) + /** * __get_user: - Get a simple variable from user space, with less checking. * @x: Variable to store result. @@ -343,6 +380,44 @@ err_label: \ (err) = -EFAULT; \ } while (0) + +/** + * __put_user_sum_enabled - Write a simple value into user space, + * assuming user access is already enabled (SUM bit enabled). + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * + * Context: User context only. This macro does NOT sleep. + * + * This variant of __put_user_sum_enabled assumes that the CPU is already + * in a state where user-space addresses can be accessed directly from + * kernel mode. Therefore, it omits the + * __enable_user_access() / __disable_user_access() calls. + * + * @ptr must have pointer-to-simple-variable type, and @x must be assignable + * to the result of dereferencing @ptr. The value of @x is copied to avoid + * re-ordering where @x is evaluated inside the block that enables user-space + * access (thus bypassing user space protection if @x is a function). + * + * Caller MUST ensure: + * - access_ok(ptr, sizeof(*ptr)) has been verified. + * - The execution context permits direct user-space writes. + * + * Returns zero on success, or -EFAULT on error. + */ +#define __put_user_sum_enabled(x, ptr) \ +({ \ + __typeof__(*(ptr)) __user *__gu_ptr = untagged_addr(ptr); \ + __typeof__(*__gu_ptr) __val = (x); \ + long __pu_err = 0; \ + \ + __chk_user_ptr(__gu_ptr); \ + \ + __put_user_error(__val, __gu_ptr, __pu_err); \ + \ + __pu_err; \ +}) + /** * __put_user: - Write a simple value into user space, with less checking. * @x: Value to copy to user space. diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c index 08378fe..a4a9395 100644 --- a/arch/riscv/kernel/signal.c +++ b/arch/riscv/kernel/signal.c @@ -45,7 +45,7 @@ static long restore_fp_state(struct pt_regs *regs, long err; struct __riscv_d_ext_state __user *state = &sc_fpregs->d; - err = __copy_from_user(¤t->thread.fstate, state, sizeof(*state)); + err = __asm_copy_from_user_sum_enabled(¤t->thread.fstate, state, sizeof(*state)); if (unlikely(err)) return err; @@ -60,7 +60,7 @@ static long save_fp_state(struct pt_regs *regs, struct __riscv_d_ext_state __user *state = &sc_fpregs->d; fstate_save(current, regs); - err = __copy_to_user(state, ¤t->thread.fstate, sizeof(*state)); + err = __asm_copy_to_user_sum_enabled(state, ¤t->thread.fstate, sizeof(*state)); return err; } #else @@ -91,15 +91,15 @@ static long save_v_state(struct pt_regs *regs, void __user **sc_vec) put_cpu_vector_context(); /* Copy everything of vstate but datap. */ - err = __copy_to_user(&state->v_state, ¤t->thread.vstate, - offsetof(struct __riscv_v_ext_state, datap)); + err = __asm_copy_to_user_sum_enabled(&state->v_state, ¤t->thread.vstate, + offsetof(struct __riscv_v_ext_state, datap)); /* Copy the pointer datap itself. */ - err |= __put_user((__force void *)datap, &state->v_state.datap); + err |= __put_user_sum_enabled((__force void *)datap, &state->v_state.datap); /* Copy the whole vector content to user space datap. */ - err |= __copy_to_user(datap, current->thread.vstate.datap, riscv_v_vsize); + err |= __asm_copy_to_user_sum_enabled(datap, current->thread.vstate.datap, riscv_v_vsize); /* Copy magic to the user space after saving all vector conetext */ - err |= __put_user(RISCV_V_MAGIC, &hdr->magic); - err |= __put_user(riscv_v_sc_size, &hdr->size); + err |= __put_user_sum_enabled(RISCV_V_MAGIC, &hdr->magic); + err |= __put_user_sum_enabled(riscv_v_sc_size, &hdr->size); if (unlikely(err)) return err; @@ -127,20 +127,20 @@ static long __restore_v_state(struct pt_regs *regs, void __user *sc_vec) riscv_v_vstate_set_restore(current, regs); /* Copy everything of __sc_riscv_v_state except datap. */ - err = __copy_from_user(¤t->thread.vstate, &state->v_state, - offsetof(struct __riscv_v_ext_state, datap)); + err = __asm_copy_from_user_sum_enabled(¤t->thread.vstate, &state->v_state, + offsetof(struct __riscv_v_ext_state, datap)); if (unlikely(err)) return err; /* Copy the pointer datap itself. */ - err = __get_user(datap, &state->v_state.datap); + err = __get_user_sum_enabled(datap, &state->v_state.datap); if (unlikely(err)) return err; /* * Copy the whole vector content from user space datap. Use * copy_from_user to prevent information leak. */ - return copy_from_user(current->thread.vstate.datap, datap, riscv_v_vsize); + return __asm_copy_from_user_sum_enabled(current->thread.vstate.datap, datap, riscv_v_vsize); } #else #define save_v_state(task, regs) (0) @@ -154,7 +154,7 @@ static long restore_sigcontext(struct pt_regs *regs, __u32 rsvd; long err; /* sc_regs is structured the same as the start of pt_regs */ - err = __copy_from_user(regs, &sc->sc_regs, sizeof(sc->sc_regs)); + err = __asm_copy_from_user_sum_enabled(regs, &sc->sc_regs, sizeof(sc->sc_regs)); if (unlikely(err)) return err; @@ -166,7 +166,7 @@ static long restore_sigcontext(struct pt_regs *regs, } /* Check the reserved word before extensions parsing */ - err = __get_user(rsvd, &sc->sc_extdesc.reserved); + err = __get_user_sum_enabled(rsvd, &sc->sc_extdesc.reserved); if (unlikely(err)) return err; if (unlikely(rsvd)) @@ -176,8 +176,8 @@ static long restore_sigcontext(struct pt_regs *regs, __u32 magic, size; struct __riscv_ctx_hdr __user *head = sc_ext_ptr; - err |= __get_user(magic, &head->magic); - err |= __get_user(size, &head->size); + err |= __get_user_sum_enabled(magic, &head->magic); + err |= __get_user_sum_enabled(size, &head->size); if (unlikely(err)) return err; @@ -238,7 +238,8 @@ SYSCALL_DEFINE0(rt_sigreturn) if (!access_ok(frame, frame_size)) goto badframe; - if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) + __enable_user_access(); + if (__asm_copy_from_user_sum_enabled(&set, &frame->uc.uc_sigmask, sizeof(set))) goto badframe; set_current_blocked(&set); @@ -248,12 +249,14 @@ SYSCALL_DEFINE0(rt_sigreturn) if (restore_altstack(&frame->uc.uc_stack)) goto badframe; + __disable_user_access(); regs->cause = -1UL; return regs->a0; badframe: + __disable_user_access(); task = current; if (show_unhandled_signals) { pr_info_ratelimited( @@ -273,7 +276,7 @@ static long setup_sigcontext(struct rt_sigframe __user *frame, long err; /* sc_regs is structured the same as the start of pt_regs */ - err = __copy_to_user(&sc->sc_regs, regs, sizeof(sc->sc_regs)); + err = __asm_copy_to_user_sum_enabled(&sc->sc_regs, regs, sizeof(sc->sc_regs)); /* Save the floating-point state. */ if (has_fpu()) err |= save_fp_state(regs, &sc->sc_fpregs); @@ -281,10 +284,10 @@ static long setup_sigcontext(struct rt_sigframe __user *frame, if ((has_vector() || has_xtheadvector()) && riscv_v_vstate_query(regs)) err |= save_v_state(regs, (void __user **)&sc_ext_ptr); /* Write zero to fp-reserved space and check it on restore_sigcontext */ - err |= __put_user(0, &sc->sc_extdesc.reserved); + err |= __put_user_sum_enabled(0, &sc->sc_extdesc.reserved); /* And put END __riscv_ctx_hdr at the end. */ - err |= __put_user(END_MAGIC, &sc_ext_ptr->magic); - err |= __put_user(END_HDR_SIZE, &sc_ext_ptr->size); + err |= __put_user_sum_enabled(END_MAGIC, &sc_ext_ptr->magic); + err |= __put_user_sum_enabled(END_HDR_SIZE, &sc_ext_ptr->size); return err; } @@ -312,6 +315,15 @@ static inline void __user *get_sigframe(struct ksignal *ksig, return (void __user *)sp; } +static int __save_altstack_sum_enabled(stack_t __user *uss, unsigned long sp) +{ + struct task_struct *t = current; + int err = __put_user_sum_enabled((void __user *)t->sas_ss_sp, &uss->ss_sp) | + __put_user_sum_enabled(t->sas_ss_flags, &uss->ss_flags) | + __put_user_sum_enabled(t->sas_ss_size, &uss->ss_size); + return err; +} + static int setup_rt_frame(struct ksignal *ksig, sigset_t *set, struct pt_regs *regs) { @@ -327,13 +339,16 @@ static int setup_rt_frame(struct ksignal *ksig, sigset_t *set, err |= copy_siginfo_to_user(&frame->info, &ksig->info); /* Create the ucontext. */ - err |= __put_user(0, &frame->uc.uc_flags); - err |= __put_user(NULL, &frame->uc.uc_link); - err |= __save_altstack(&frame->uc.uc_stack, regs->sp); + __enable_user_access(); + err |= __put_user_sum_enabled(0, &frame->uc.uc_flags); + err |= __put_user_sum_enabled(NULL, &frame->uc.uc_link); + err |= __save_altstack_sum_enabled(&frame->uc.uc_stack, regs->sp); err |= setup_sigcontext(frame, regs); - err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); - if (err) + err |= __asm_copy_to_user_sum_enabled(&frame->uc.uc_sigmask, set, sizeof(*set)); + if (err) { + __disable_user_access(); return -EFAULT; + } /* Set up to return from userspace. */ #ifdef CONFIG_MMU @@ -344,9 +359,12 @@ static int setup_rt_frame(struct ksignal *ksig, sigset_t *set, * For the nommu case we don't have a VDSO. Instead we push two * instructions to call the rt_sigreturn syscall onto the user stack. */ - if (copy_to_user(&frame->sigreturn_code, __user_rt_sigreturn, - sizeof(frame->sigreturn_code))) + if (__asm_copy_to_user_sum_enabled(&frame->sigreturn_code, __user_rt_sigreturn, + sizeof(frame->sigreturn_code))) { + __disable_user_access(); return -EFAULT; + } + __disable_user_access(); addr = (unsigned long)&frame->sigreturn_code; /* Make sure the two instructions are pushed to icache. */ -- 2.25.1