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Wed, 03 Dec 2025 22:14:45 -0800 (PST) Received: from xeon ([188.163.112.74]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b79f445968asm50607866b.3.2025.12.03.22.14.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Dec 2025 22:14:45 -0800 (PST) From: Svyatoslav Ryhel To: Thierry Reding , Thierry Reding , Mikko Perttunen , David Airlie , Simona Vetter , Jonathan Hunter , Svyatoslav Ryhel Cc: dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 0/2 RESEND] tegra: dsi: improvements for video mode ganged panels Date: Thu, 4 Dec 2025 08:14:34 +0200 Message-ID: <20251204061436.5401-1-clamor95@gmail.com> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Expand SOL delay and packet parameters calculations to include video mode ganged panels. At the moment only command mode ganged panels are supported. Svyatoslav Ryhel (2): gpu/drm: tegra: dsi: make SOL delay calculation mode independent gpu/drm: tegra: dsi: calculate packet parameters for video mode drivers/gpu/drm/tegra/dsi.c | 54 ++++++++++++++++++------------------- 1 file changed, 27 insertions(+), 27 deletions(-) -- 2.48.1