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Unal" , DENG Qingfang , Sean Wang , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, netdev@vger.kernel.org Subject: Re: [PATCH v3 2/2] net: dsa: mt7530: Use GPIO polarity to generate correct reset sequence Message-ID: <20251204171159.yy3nkvzttxecmhfo@skbuf> References: <0675b35f-217d-4261-9e3f-2eb24753d43c@lunn.ch> <20251130080731.ty2dlxaypxvodxiw@skbuf> <3fbc4e67-b931-421c-9d83-2214aaa2f6ed@lunn.ch> <0d85e1e6-ea75-4f20-aef1-90d446b4bfa1@kernel.org> <00f308a1-a4b1-4f20-8d8e-459ddf4c39b1@gmx.de> <20251204131626.upw77jncqfwxydww@skbuf> <4170c560-1edd-4ff8-96af-a479063be4a5@kernel.org> <20251204160247.yz42mnxvzhxas5jc@skbuf> <66d080f1-e989-451f-9d5e-34460e5eb1b0@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <66d080f1-e989-451f-9d5e-34460e5eb1b0@kernel.org> On Thu, Dec 04, 2025 at 05:48:07PM +0100, Krzysztof Kozlowski wrote: > Both are the same - inverter or NOT gate, same stuff. It is just > connecting wire to pull up, not actual component on the board (although > one could make and buy such component as well...). We never describe > these inverters in the DTS, these are just too trivial circuits, thus > the final GPIO_ACTIVE_XXX should already include whatever is on the wire > between SoC and device. Please read what Andrew said: https://lore.kernel.org/netdev/3fbc4e67-b931-421c-9d83-2214aaa2f6ed@lunn.ch/ Assuming there is not a NOT gate placed between the GPIO and the reset pin, because the board designer decided to do that for some reason? ~~~~~~~~~~~~~~ You two are *not* talking about the same thing. I dismissed the probability of there being a NOT gate in the form of a discrete chip on the PCB, *exactly because* you can most likely invert the signal in the GPIO pin itself.