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Thu, 4 Dec 2025 14:00:27 -0600 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 5B4K0RMT2099191; Thu, 4 Dec 2025 14:00:27 -0600 Date: Thu, 4 Dec 2025 14:00:27 -0600 From: Nishanth Menon To: Mark Brown CC: Francesco Dolcini , Siddharth Vadapalli , Anurag Dutta , , , Subject: Re: [PATCH v2] spi: cadence-quadspi: Parse DT for flashes with the rest of the DT parsing Message-ID: <20251204200027.p4osjcj67bcmsvck@skipper> References: <20251204-spi-cadence-qspi-runtime-pm-imbalance-v2-1-10af9115d531@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20251204-spi-cadence-qspi-runtime-pm-imbalance-v2-1-10af9115d531@kernel.org> X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF0000449F:EE_|SJ0PR10MB4687:EE_ X-MS-Office365-Filtering-Correlation-Id: e3634828-1de4-4503-690d-08de336fc89a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700013|82310400026|7053199007; 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X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Dec 2025 20:00:33.1928 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e3634828-1de4-4503-690d-08de336fc89a X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.23.194];Helo=[lewvzet200.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF0000449F.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR10MB4687 On 19:13-20251204, Mark Brown wrote: > The recent refactoring of where runtime PM is enabled done in commit > f1eb4e792bb1 ("spi: spi-cadence-quadspi: Enable pm runtime earlier to > avoid imbalance") made the fact that when we do a pm_runtime_disable() > in the error paths of probe() we can trigger a runtime disable which in > turn results in duplicate clock disables. This is particularly likely > to happen when there is missing or broken DT description for the flashes > attached to the controller. > > Early on in the probe function we do a pm_runtime_get_noresume() since > the probe function leaves the device in a powered up state but in the > error path we can't assume that PM is enabled so we also manually > disable everything, including clocks. This means that when runtime PM is > active both it and the probe function release the same reference to the > main clock for the IP, triggering warnings from the clock subsystem: > > [ 8.693719] clk:75:7 already disabled > [ 8.693791] WARNING: CPU: 1 PID: 185 at /usr/src/kernel/drivers/clk/clk.c:1188 clk_core_disable+0xa0/0xb > ... > [ 8.694261] clk_core_disable+0xa0/0xb4 (P) > [ 8.694272] clk_disable+0x38/0x60 > [ 8.694283] cqspi_probe+0x7c8/0xc5c [spi_cadence_quadspi] > [ 8.694309] platform_probe+0x5c/0xa4 > > Dealing with this issue properly is complicated by the fact that we > don't know if runtime PM is active so can't tell if it will disable the > clocks or not. We can, however, sidestep the issue for the flash > descriptions by moving their parsing to when we parse the controller > properties which also save us doing a bunch of setup which can never be > used so let's do that. > > Reported-by: Francesco Dolcini > Closes: https://lore.kernel.org/r/20251201072844.GA6785@francesco-nb > Signed-off-by: Mark Brown > Cc: stable@vger.kernel.org https://gist.github.com/nmenon/5ca89b617113e9dbb31d4630586af945#file-gistfile1-txt-L1004 next-20251204 + this patch -> The issue still exists at least on my platform. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D https://ti.com/opensource