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Mon, 08 Dec 2025 09:01:12 -0800 (PST) Received: from hu-mojha-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7e29f2ecf89sm13785614b3a.12.2025.12.08.09.01.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Dec 2025 09:01:11 -0800 (PST) Date: Mon, 8 Dec 2025 22:31:04 +0530 From: Mukesh Ojha To: Bjorn Andersson Cc: Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v8 11/14] firmware: qcom_scm: Add qcom_scm_pas_get_rsc_table() to get resource table Message-ID: <20251208170104.psvk4xxo7b4bg2eo@hu-mojha-hyd.qualcomm.com> References: <20251121-kvm_rproc_v8-v8-0-8e8e9fb0eca0@oss.qualcomm.com> <20251121-kvm_rproc_v8-v8-11-8e8e9fb0eca0@oss.qualcomm.com> <86f3cb9f-e42d-40f9-9103-1a4953c66c71@oss.qualcomm.com> <20251124152538.wt3kzztqmpr76hsx@hu-mojha-hyd.qualcomm.com> <4376b7cf-7088-412b-8596-bdec5bdc273d@oss.qualcomm.com> <20251204122806.s7lnqffgcrd7usem@hu-mojha-hyd.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Authority-Analysis: v=2.4 cv=ep7SD4pX c=1 sm=1 tr=0 ts=6937045a cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=kj9zAlcOel0A:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=nmjsJmyt1rCFr6M104wA:9 a=CjuIK1q_8ugA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-ORIG-GUID: o51TSuFubbDv0RNdz0j3AFAXEIuVemX7 X-Proofpoint-GUID: o51TSuFubbDv0RNdz0j3AFAXEIuVemX7 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjA4MDE0NCBTYWx0ZWRfX+pv5i7OgH66k 1Ipi91bXktg/DcdkAqa+XedoSX1ZaIjIMWcy//XYmKMLpxGkQ1K8x8xnadULgPMJTqMnoL2k7JK Rxy93U1vRGZU1dUeKGubWsk9zmTrnweszP1pe+R50Pe9x90PuGS7mK1IHWRENvcYRxd2xR5BNB8 q+nNbSoReSwA2TOvTQZdfBxQ9xBojLc1OJTBnWUqRI3S4yS+qHuOB+xoDcuEM6am49mKz2Wxd9Y EodpBiKObgs98rt9ivPT4/aQfyAqDAy/Q88od2+Qu/NwaDlEX+KmLi8iVLFYd3fJdACt78imFJH ftkBPs0xfvEaJtx5k72+aL0iut5KkUuA7mGO7Pva1Mfg6FDaUPTwVXrds4oTWxuJoleDU0mJr6D nm+I2DtlGpbyIUeHLSxLPqa42UNMkQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-06_02,2025-12-04_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 clxscore=1015 bulkscore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512080144 On Fri, Dec 05, 2025 at 04:17:56PM -0600, Bjorn Andersson wrote: > On Fri, Dec 05, 2025 at 02:15:00PM +0100, Konrad Dybcio wrote: > > On 12/4/25 1:28 PM, Mukesh Ojha wrote: > > > On Wed, Dec 03, 2025 at 01:36:32PM +0100, Konrad Dybcio wrote: > > >> On 11/24/25 4:25 PM, Mukesh Ojha wrote: > > >>> On Mon, Nov 24, 2025 at 12:48:31PM +0100, Konrad Dybcio wrote: > > >>>> On 11/21/25 12:01 PM, Mukesh Ojha wrote: > > >>>>> Qualcomm remote processor may rely on Static and Dynamic resources for > > >>>>> it to be functional. Static resources are fixed like for example, > > >>>>> memory-mapped addresses required by the subsystem and dynamic > > >>>>> resources, such as shared memory in DDR etc., are determined at > > >>>>> runtime during the boot process. > > >>>>> > > >>>>> For most of the Qualcomm SoCs, when run with Gunyah or older QHEE > > >>>>> hypervisor, all the resources whether it is static or dynamic, is > > >>>>> managed by the hypervisor. Dynamic resources if it is present for a > > >>>>> remote processor will always be coming from secure world via SMC call > > >>>>> while static resources may be present in remote processor firmware > > >>>>> binary or it may be coming qcom_scm_pas_get_rsc_table() SMC call along > > >>>>> with dynamic resources. > > > > [...] > > > > > Just to avoid iteration, are you suggesting that we can keep this > > > guesswork as part of __qcom_scm_pas_get_rsc_table() and start with > > > something smaller than SZ_16K? > > > > > > I kind of agree with the first part, but SZ_16K was the recommended size > > > from the firmware for Lemans to start with, in order to pass the SMC > > > successfully on the first try. However, the same size was failing for > > > Glymur, and it required a second attempt with the correct size. > > > > It depends on the payload, which you're probably much more familiar with. > > If 95% of them will be closer to e.g. 1K in size, it perhaps makes sense > > to use up the additional few dozen cycles on our amazingly fast CPUs and > > retry as necessary, instead of blindly reserving a whole bunch of memory. > > > > Those "few dozen cycles", is tasked with sending messages to RPMh for > voting and unvoting the buses, then tzmem will hopefully hit the > genpool, twice, and then radix updates, and then more genpool updated > and more radix tree work. And then of course there's the one context > switch to secure world. > > If we don't have space in the genpool, we're going to grow > dma_alloc_coherent, extend the genpool, call secure world to register > the new tzmem. And then for all those cases where the allocation wasn't > enough, the retry (with updated size) will not fit in the > PAGE_ALIGN(size) genpool that was created, so we'll do this twice. > > Fortunately the tzmem growing should only happen on first remoteproc > boot, but I think it's a bit optimistic to say "a few dozen"... > > > The drawback with making it 16KB is that we're not going to test that > error path very often. But the more idiomatic form of first calling with > a size of 0, then allocate and pass the proper size, seems a bit > wasteful to me as well - in particular if we do it anew each subsystem > boot. > > PS. 16KB is 0.03% of the ADSP carveout (or 3% of the ADSP DeviceTree > carveout...). What you suggest ? 0x36c8 bytes was the size for CDSP resource table on Lemans. -- -Mukesh Ojha