From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from sg-1-102.ptr.blmpb.com (sg-1-102.ptr.blmpb.com [118.26.132.102]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2DF53B8D41 for ; Thu, 11 Dec 2025 04:18:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=118.26.132.102 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765426684; cv=none; b=XdqHy66v0u20oqH0nWTdXEwp6khaLvtobiqMNtnGFZa8cjyjLwTiFmZZbmO9gZY4gASc48XVvZF3FE6NaZN+hPwUhMZk4OjdwGe5BtaMiOlgkEoayvg7jESyBxYK/sRzHVi/HTWTTRZMfzUcx1ReROApwJr1y9sprc9itss/Goc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765426684; c=relaxed/simple; bh=hSsBqGM03RkYT6B1UfLrOyg0LwJA+TOZSMGnQCyHeGE=; h=In-Reply-To:From:Date:References:Cc:Message-Id:Content-Type:To: Subject:Mime-Version; b=LwXt8LHp5hw58tfjBKMPU4C/Q6rxsL2KfT+x/kx8NOCvgBHLKgfJvM0vIiMM9x+qH4UWnjsL5XBFc2Clnu8ZEhyRwXuNqCcqZp3tpWFQfZv1R+7RoGFGFUhUyzOAvGsGp14XNTM71lgbYRTl5L3hLUBDkNm/NavnoCMU+NKMJK0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=bytedance.com; spf=pass smtp.mailfrom=bytedance.com; dkim=pass (2048-bit key) header.d=bytedance.com header.i=@bytedance.com header.b=bp4giZOC; arc=none smtp.client-ip=118.26.132.102 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=bytedance.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bytedance.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bytedance.com header.i=@bytedance.com header.b="bp4giZOC" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=2212171451; d=bytedance.com; t=1765426675; h=from:subject: mime-version:from:date:message-id:subject:to:cc:reply-to:content-type: mime-version:in-reply-to:message-id; bh=Cqz07PQNXLmM+OTndmKNcXhC/jyGV+A/BIxRvkrjb+M=; b=bp4giZOCT/0rqBm2MbUYLdrN7nsdAfUUomlJjBlbZS1Z9GiWsoPo6kbsecdZGZtaOtmHvU wkWtX0dL3iI00Ojif1uSy7fg8SGqX41hwDEIdprVPS/bg4DNKytd7/vFybFTQY/2XDGBeD luPQWxU6hWG8mM3P6TfdgrezbAsE1HJGTXYOcXKQwwuUmbX/ZQXP0+4enuKW69f2zlAac9 JDUuInDNP8R+CneRhrnpDY4w9xtCMkDAt56bEMluoCoV0E/wQNya4sMzvH/Lb/Y+dV8zv4 bIovMSvLl8qyeAAOcaqNpX/gcHuUSqCvpcHN4BLLnWYPFnIpbWaihxEF5IvLjQ== Content-Transfer-Encoding: quoted-printable In-Reply-To: <98a2a099-0b90-4837-a20c-742c883e8eea@linux.intel.com> From: "Jinhui Guo" Date: Thu, 11 Dec 2025 12:17:41 +0800 X-Lms-Return-Path: X-Original-From: Jinhui Guo References: <98a2a099-0b90-4837-a20c-742c883e8eea@linux.intel.com> Cc: , , , , , Message-Id: <20251211041741.2132-1-guojinhui.liam@bytedance.com> Content-Type: text/plain; charset=UTF-8 X-Mailer: git-send-email 2.17.1 To: Subject: Re: [PATCH 1/2] iommu/vt-d: Skip dev-iotlb flush for inaccessible PCIe device without scalable mode Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 On Thu, Dec 11, 2025 10:10:52AM +0800, Baolu Lu wrote: > > Since __context_flush_dev_iotlb() is only called on > > {attach,release}_dev paths (not hot), add pci_device_is_present() > > there to skip inaccessible devices and avoid the hard-lock. > >=20 > > Fixes: 37764b952e1b ("iommu/vt-d: Global devTLB flush when present cont= ext entry changed") > > Fixes: 81e921fd3216 ("iommu/vt-d: Fix NULL domain on device release") > > Cc: stable@vger.kernel.org > > > Signed-off-by: Jinhui Guo > > --- > > drivers/iommu/intel/pasid.c | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > >=20 > > diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c > > index 3e2255057079..b1e8eb6a6504 100644 > > --- a/drivers/iommu/intel/pasid.c > > +++ b/drivers/iommu/intel/pasid.c > > @@ -1099,9 +1099,20 @@ int intel_pasid_setup_sm_context(struct device *= dev) > > */ > > static void __context_flush_dev_iotlb(struct device_domain_info *info= ) > > { > > + struct pci_dev *pdev; > > + > > if (!info->ats_enabled) > > return; > > =20 > > + /* > > + * Skip dev-IOTLB flush for inaccessible PCIe devices to prevent the > > + * Intel IOMMU from waiting indefinitely for an ATS invalidation that > > + * cannot complete. > > + */ > > + pdev =3D dev_is_pci(info->dev) ? to_pci_dev(info->dev) : NULL; > > + if (pdev && !pci_device_is_present(pdev)) > > + return; > > Could simply be > > if (dev_is_pci(info->dev) && > !pci_device_is_present(to_pci_dev(info->dev))) > return; > > ? > > > + > > qi_flush_dev_iotlb(info->iommu, PCI_DEVID(info->bus, info->devfn), > > info->pfsid, info->ats_qdep, 0, MAX_AGAW_PFN_WIDTH); > > =20 > Thanks, > baolu Hi, baolu Thanks for your time and suggestions. I=E2=80=99ve sent v2 (https://lore.kernel.org/all/20251211035946.2071-1-guo= jinhui.liam@bytedance.com/) with the following changes: 1. Simplified the pci_device_is_present() check in __context_flush_dev_iotl= b(). 2. Added Cc: stable@vger.kernel.org to both patches. Best Regards, Jinhui