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Tue, 16 Dec 2025 14:31:16 +0100 (CET) From: Alexander Stein To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: Markus Niebel , linux@ew.tq-group.com, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alexander Stein Subject: [PATCH 4/4] arm64: dts: imx8mm-tqma8mqml: fix LDO5 power off Date: Tue, 16 Dec 2025 14:31:07 +0100 Message-ID: <20251216133110.905950-4-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251216133110.905950-1-alexander.stein@ew.tq-group.com> References: <20251216133110.905950-1-alexander.stein@ew.tq-group.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-cloud-security-sender:alexander.stein@ew.tq-group.com X-cloud-security-recipient:linux-kernel@vger.kernel.org X-cloud-security-body-digest:f05457902f37798828b49e9ea5497943 X-cloud-security-crypt: load encryption module X-cloud-security-Mailarchiv: E-Mail archived for: alexander.stein@ew.tq-group.com X-cloud-security-Mailarchivtype:outbound X-cloud-security-Virusscan:CLEAN X-cloud-security-disclaimer: This E-Mail was scanned by E-Mailservice on mx-relay93-hz2.antispameurope.com with 4dVyW90kQLz4QHDJ X-cloud-security-connect: he-nlb01-hz1.hornetsecurity.com[94.100.132.6], TLS=1, IP=94.100.132.6 X-cloud-security-Digest:8607d1a79e30606a7dcee9ac57a97bd3 X-cloud-security:scantime:2.034 DKIM-Signature: a=rsa-sha256; bh=x9mGmXqHfOmeLgdEOLDPoxQ5MFnm0tlfSuhg2kM00pQ=; c=relaxed/relaxed; d=ew.tq-group.com; h=content-type:mime-version:subject:from:to:message-id:date; s=hse1; t=1765891892; v=1; b=plvr4YLZutUxOkvNfT4A4N4TImJYcovsdQhCoKgScjv7X5/QFEr3hTBqqF093d1uP6T+ZrYH a0uVd8K3A4MI+GCjKpTJee8AJO1XgwDVlwL+UJZgWndXmdPGZdi14BXLv3jnqvJ9bX1eRh+Mewr t6OhuADc1+DnSgzG9pse+DfzgnkStQaHVv5hNVvEyLx8NPlnwc59NegHu5nMXdNsab3lxSgQxow YIlQ8RMa1fZrq7n+isa9Q6pCijlIU7WwGKWstLTCSRlyfTcyVkAhjwu7MOCfVWinysOGNNAN2gH LhHuGDPT0UFCJbXIIe9oP0PYVYMKKCQrvJcLvdp1fCJqg== From: Markus Niebel Fix SD card removal caused by automatic LDO5 power off after boot. To prevent this, add vqmmc regulator for USDHC, using a GPIO-controlled regulator that is supplied by LDO5. Since this is implemented on SoM but used on baseboards with SD-card interface, implement the functionality on SoM part and optionally enable it on baseboards if needed. Signed-off-by: Markus Niebel Signed-off-by: Alexander Stein --- .../dts/freescale/imx8mm-tqma8mqml-mba8mx.dts | 13 ++++++----- .../boot/dts/freescale/imx8mm-tqma8mqml.dtsi | 22 +++++++++++++++++++ 2 files changed, 29 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts index b941c8c4f7bb4..8dcc5cbcb8f66 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts @@ -101,6 +101,10 @@ &pcie0 { status = "okay"; }; +®_usdhc2_vqmmc { + status = "okay"; +}; + &sai3 { assigned-clocks = <&clk IMX8MM_CLK_SAI3>; assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; @@ -276,8 +280,7 @@ pinctrl_usdhc2: usdhc2grp { , , , - , - ; + ; }; pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { @@ -286,8 +289,7 @@ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { , , , - , - ; + ; }; pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { @@ -296,7 +298,6 @@ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { , , , - , - ; + ; }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi index 2e3860a5f4fd2..29b298af0d739 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi @@ -16,6 +16,20 @@ memory@40000000 { reg = <0x00000000 0x40000000 0 0x40000000>; }; + reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc { + compatible = "regulator-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usdhc2_vqmmc>; + regulator-name = "V_SD2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + states = <1800000 0x1>, + <3300000 0x0>; + vin-supply = <&ldo5_reg>; + status = "disabled"; + }; + reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -227,6 +241,10 @@ &pcie_phy { fsl,clkreq-unsupported; }; +&usdhc2 { + vqmmc-supply = <®_usdhc2_vqmmc>; +}; + &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; @@ -281,6 +299,10 @@ pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { fsl,pins = ; }; + pinctrl_reg_usdhc2_vqmmc: regusdhc2vqmmcgrp { + fsl,pins = ; + }; + pinctrl_usdhc3: usdhc3grp { fsl,pins = , , -- 2.43.0