From: Steven Price <steven.price@arm.com>
To: kvm@vger.kernel.org, kvmarm@lists.linux.dev
Cc: Steven Price <steven.price@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>,
James Morse <james.morse@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Joey Gouly <joey.gouly@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Christoffer Dall <christoffer.dall@arm.com>,
Fuad Tabba <tabba@google.com>,
linux-coco@lists.linux.dev,
Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>,
Gavin Shan <gshan@redhat.com>,
Shanker Donthineni <sdonthineni@nvidia.com>,
Alper Gun <alpergun@google.com>,
"Aneesh Kumar K . V" <aneesh.kumar@kernel.org>,
Emi Kisanuki <fj0570is@fujitsu.com>,
Vishal Annapurve <vannapurve@google.com>
Subject: [PATCH v12 03/46] arm64: RMI: Add SMC definitions for calling the RMM
Date: Wed, 17 Dec 2025 10:10:40 +0000 [thread overview]
Message-ID: <20251217101125.91098-4-steven.price@arm.com> (raw)
In-Reply-To: <20251217101125.91098-1-steven.price@arm.com>
The RMM (Realm Management Monitor) provides functionality that can be
accessed by SMC calls from the host.
The SMC definitions are based on DEN0137[1] version 1.0-rel0
[1] https://developer.arm.com/documentation/den0137/1-0rel0/
Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Steven Price <steven.price@arm.com>
---
Changes since v9:
* Corrected size of 'ripas_value' in struct rec_exit. The spec states
this is an 8-bit type with padding afterwards (rather than a u64).
Changes since v8:
* Added RMI_PERMITTED_GICV3_HCR_BITS to define which bits the RMM
permits to be modified.
Changes since v6:
* Renamed REC_ENTER_xxx defines to include 'FLAG' to make it obvious
these are flag values.
Changes since v5:
* Sorted the SMC #defines by value.
* Renamed SMI_RxI_CALL to SMI_RMI_CALL since the macro is only used for
RMI calls.
* Renamed REC_GIC_NUM_LRS to REC_MAX_GIC_NUM_LRS since the actual
number of available list registers could be lower.
* Provided a define for the reserved fields of FeatureRegister0.
* Fix inconsistent names for padding fields.
Changes since v4:
* Update to point to final released RMM spec.
* Minor rearrangements.
Changes since v3:
* Update to match RMM spec v1.0-rel0-rc1.
Changes since v2:
* Fix specification link.
* Rename rec_entry->rec_enter to match spec.
* Fix size of pmu_ovf_status to match spec.
---
arch/arm64/include/asm/rmi_smc.h | 269 +++++++++++++++++++++++++++++++
1 file changed, 269 insertions(+)
create mode 100644 arch/arm64/include/asm/rmi_smc.h
diff --git a/arch/arm64/include/asm/rmi_smc.h b/arch/arm64/include/asm/rmi_smc.h
new file mode 100644
index 000000000000..1000368f1bca
--- /dev/null
+++ b/arch/arm64/include/asm/rmi_smc.h
@@ -0,0 +1,269 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023-2024 ARM Ltd.
+ *
+ * The values and structures in this file are from the Realm Management Monitor
+ * specification (DEN0137) version 1.0-rel0:
+ * https://developer.arm.com/documentation/den0137/1-0rel0/
+ */
+
+#ifndef __ASM_RMI_SMC_H
+#define __ASM_RMI_SMC_H
+
+#include <linux/arm-smccc.h>
+
+#define SMC_RMI_CALL(func) \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_64, \
+ ARM_SMCCC_OWNER_STANDARD, \
+ (func))
+
+#define SMC_RMI_VERSION SMC_RMI_CALL(0x0150)
+#define SMC_RMI_GRANULE_DELEGATE SMC_RMI_CALL(0x0151)
+#define SMC_RMI_GRANULE_UNDELEGATE SMC_RMI_CALL(0x0152)
+#define SMC_RMI_DATA_CREATE SMC_RMI_CALL(0x0153)
+#define SMC_RMI_DATA_CREATE_UNKNOWN SMC_RMI_CALL(0x0154)
+#define SMC_RMI_DATA_DESTROY SMC_RMI_CALL(0x0155)
+
+#define SMC_RMI_REALM_ACTIVATE SMC_RMI_CALL(0x0157)
+#define SMC_RMI_REALM_CREATE SMC_RMI_CALL(0x0158)
+#define SMC_RMI_REALM_DESTROY SMC_RMI_CALL(0x0159)
+#define SMC_RMI_REC_CREATE SMC_RMI_CALL(0x015a)
+#define SMC_RMI_REC_DESTROY SMC_RMI_CALL(0x015b)
+#define SMC_RMI_REC_ENTER SMC_RMI_CALL(0x015c)
+#define SMC_RMI_RTT_CREATE SMC_RMI_CALL(0x015d)
+#define SMC_RMI_RTT_DESTROY SMC_RMI_CALL(0x015e)
+#define SMC_RMI_RTT_MAP_UNPROTECTED SMC_RMI_CALL(0x015f)
+
+#define SMC_RMI_RTT_READ_ENTRY SMC_RMI_CALL(0x0161)
+#define SMC_RMI_RTT_UNMAP_UNPROTECTED SMC_RMI_CALL(0x0162)
+
+#define SMC_RMI_PSCI_COMPLETE SMC_RMI_CALL(0x0164)
+#define SMC_RMI_FEATURES SMC_RMI_CALL(0x0165)
+#define SMC_RMI_RTT_FOLD SMC_RMI_CALL(0x0166)
+#define SMC_RMI_REC_AUX_COUNT SMC_RMI_CALL(0x0167)
+#define SMC_RMI_RTT_INIT_RIPAS SMC_RMI_CALL(0x0168)
+#define SMC_RMI_RTT_SET_RIPAS SMC_RMI_CALL(0x0169)
+
+#define RMI_ABI_MAJOR_VERSION 1
+#define RMI_ABI_MINOR_VERSION 0
+
+#define RMI_ABI_VERSION_GET_MAJOR(version) ((version) >> 16)
+#define RMI_ABI_VERSION_GET_MINOR(version) ((version) & 0xFFFF)
+#define RMI_ABI_VERSION(major, minor) (((major) << 16) | (minor))
+
+#define RMI_UNASSIGNED 0
+#define RMI_ASSIGNED 1
+#define RMI_TABLE 2
+
+#define RMI_RETURN_STATUS(ret) ((ret) & 0xFF)
+#define RMI_RETURN_INDEX(ret) (((ret) >> 8) & 0xFF)
+
+#define RMI_SUCCESS 0
+#define RMI_ERROR_INPUT 1
+#define RMI_ERROR_REALM 2
+#define RMI_ERROR_REC 3
+#define RMI_ERROR_RTT 4
+
+enum rmi_ripas {
+ RMI_EMPTY = 0,
+ RMI_RAM = 1,
+ RMI_DESTROYED = 2,
+};
+
+#define RMI_NO_MEASURE_CONTENT 0
+#define RMI_MEASURE_CONTENT 1
+
+#define RMI_FEATURE_REGISTER_0_S2SZ GENMASK(7, 0)
+#define RMI_FEATURE_REGISTER_0_LPA2 BIT(8)
+#define RMI_FEATURE_REGISTER_0_SVE_EN BIT(9)
+#define RMI_FEATURE_REGISTER_0_SVE_VL GENMASK(13, 10)
+#define RMI_FEATURE_REGISTER_0_NUM_BPS GENMASK(19, 14)
+#define RMI_FEATURE_REGISTER_0_NUM_WPS GENMASK(25, 20)
+#define RMI_FEATURE_REGISTER_0_PMU_EN BIT(26)
+#define RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS GENMASK(31, 27)
+#define RMI_FEATURE_REGISTER_0_HASH_SHA_256 BIT(32)
+#define RMI_FEATURE_REGISTER_0_HASH_SHA_512 BIT(33)
+#define RMI_FEATURE_REGISTER_0_GICV3_NUM_LRS GENMASK(37, 34)
+#define RMI_FEATURE_REGISTER_0_MAX_RECS_ORDER GENMASK(41, 38)
+#define RMI_FEATURE_REGISTER_0_Reserved GENMASK(63, 42)
+
+#define RMI_REALM_PARAM_FLAG_LPA2 BIT(0)
+#define RMI_REALM_PARAM_FLAG_SVE BIT(1)
+#define RMI_REALM_PARAM_FLAG_PMU BIT(2)
+
+/*
+ * Note many of these fields are smaller than u64 but all fields have u64
+ * alignment, so use u64 to ensure correct alignment.
+ */
+struct realm_params {
+ union { /* 0x0 */
+ struct {
+ u64 flags;
+ u64 s2sz;
+ u64 sve_vl;
+ u64 num_bps;
+ u64 num_wps;
+ u64 pmu_num_ctrs;
+ u64 hash_algo;
+ };
+ u8 padding0[0x400];
+ };
+ union { /* 0x400 */
+ u8 rpv[64];
+ u8 padding1[0x400];
+ };
+ union { /* 0x800 */
+ struct {
+ u64 vmid;
+ u64 rtt_base;
+ s64 rtt_level_start;
+ u64 rtt_num_start;
+ };
+ u8 padding2[0x800];
+ };
+};
+
+/*
+ * The number of GPRs (starting from X0) that are
+ * configured by the host when a REC is created.
+ */
+#define REC_CREATE_NR_GPRS 8
+
+#define REC_PARAMS_FLAG_RUNNABLE BIT_ULL(0)
+
+#define REC_PARAMS_AUX_GRANULES 16
+
+struct rec_params {
+ union { /* 0x0 */
+ u64 flags;
+ u8 padding0[0x100];
+ };
+ union { /* 0x100 */
+ u64 mpidr;
+ u8 padding1[0x100];
+ };
+ union { /* 0x200 */
+ u64 pc;
+ u8 padding2[0x100];
+ };
+ union { /* 0x300 */
+ u64 gprs[REC_CREATE_NR_GPRS];
+ u8 padding3[0x500];
+ };
+ union { /* 0x800 */
+ struct {
+ u64 num_rec_aux;
+ u64 aux[REC_PARAMS_AUX_GRANULES];
+ };
+ u8 padding4[0x800];
+ };
+};
+
+#define REC_ENTER_FLAG_EMULATED_MMIO BIT(0)
+#define REC_ENTER_FLAG_INJECT_SEA BIT(1)
+#define REC_ENTER_FLAG_TRAP_WFI BIT(2)
+#define REC_ENTER_FLAG_TRAP_WFE BIT(3)
+#define REC_ENTER_FLAG_RIPAS_RESPONSE BIT(4)
+
+#define REC_RUN_GPRS 31
+#define REC_MAX_GIC_NUM_LRS 16
+
+#define RMI_PERMITTED_GICV3_HCR_BITS (ICH_HCR_EL2_UIE | \
+ ICH_HCR_EL2_LRENPIE | \
+ ICH_HCR_EL2_NPIE | \
+ ICH_HCR_EL2_VGrp0EIE | \
+ ICH_HCR_EL2_VGrp0DIE | \
+ ICH_HCR_EL2_VGrp1EIE | \
+ ICH_HCR_EL2_VGrp1DIE | \
+ ICH_HCR_EL2_TDIR)
+
+struct rec_enter {
+ union { /* 0x000 */
+ u64 flags;
+ u8 padding0[0x200];
+ };
+ union { /* 0x200 */
+ u64 gprs[REC_RUN_GPRS];
+ u8 padding1[0x100];
+ };
+ union { /* 0x300 */
+ struct {
+ u64 gicv3_hcr;
+ u64 gicv3_lrs[REC_MAX_GIC_NUM_LRS];
+ };
+ u8 padding2[0x100];
+ };
+ u8 padding3[0x400];
+};
+
+#define RMI_EXIT_SYNC 0x00
+#define RMI_EXIT_IRQ 0x01
+#define RMI_EXIT_FIQ 0x02
+#define RMI_EXIT_PSCI 0x03
+#define RMI_EXIT_RIPAS_CHANGE 0x04
+#define RMI_EXIT_HOST_CALL 0x05
+#define RMI_EXIT_SERROR 0x06
+
+struct rec_exit {
+ union { /* 0x000 */
+ u8 exit_reason;
+ u8 padding0[0x100];
+ };
+ union { /* 0x100 */
+ struct {
+ u64 esr;
+ u64 far;
+ u64 hpfar;
+ };
+ u8 padding1[0x100];
+ };
+ union { /* 0x200 */
+ u64 gprs[REC_RUN_GPRS];
+ u8 padding2[0x100];
+ };
+ union { /* 0x300 */
+ struct {
+ u64 gicv3_hcr;
+ u64 gicv3_lrs[REC_MAX_GIC_NUM_LRS];
+ u64 gicv3_misr;
+ u64 gicv3_vmcr;
+ };
+ u8 padding3[0x100];
+ };
+ union { /* 0x400 */
+ struct {
+ u64 cntp_ctl;
+ u64 cntp_cval;
+ u64 cntv_ctl;
+ u64 cntv_cval;
+ };
+ u8 padding4[0x100];
+ };
+ union { /* 0x500 */
+ struct {
+ u64 ripas_base;
+ u64 ripas_top;
+ u8 ripas_value;
+ u8 padding8[7];
+ };
+ u8 padding5[0x100];
+ };
+ union { /* 0x600 */
+ u16 imm;
+ u8 padding6[0x100];
+ };
+ union { /* 0x700 */
+ struct {
+ u8 pmu_ovf_status;
+ };
+ u8 padding7[0x100];
+ };
+};
+
+struct rec_run {
+ struct rec_enter enter;
+ struct rec_exit exit;
+};
+
+#endif /* __ASM_RMI_SMC_H */
--
2.43.0
next prev parent reply other threads:[~2025-12-17 10:12 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-17 10:10 [PATCH v12 00/46] arm64: Support for Arm CCA in KVM Steven Price
2025-12-17 10:10 ` [PATCH v12 01/46] kvm: arm64: Include kvm_emulate.h in kvm/arm_psci.h Steven Price
2025-12-17 10:10 ` [PATCH v12 02/46] arm64: RME: Handle Granule Protection Faults (GPFs) Steven Price
2025-12-17 10:10 ` Steven Price [this message]
2025-12-17 10:10 ` [PATCH v12 04/46] arm64: RMI: Add wrappers for RMI calls Steven Price
2025-12-17 10:10 ` [PATCH v12 05/46] arm64: RMI: Check for RMI support at KVM init Steven Price
2025-12-17 10:10 ` [PATCH v12 06/46] arm64: RMI: Define the user ABI Steven Price
2026-01-23 16:47 ` Suzuki K Poulose
2026-01-26 9:37 ` Steven Price
2026-03-02 14:25 ` Marc Zyngier
2026-03-02 15:23 ` Steven Price
2026-03-02 17:13 ` Suzuki K Poulose
2026-03-03 13:13 ` Marc Zyngier
2026-03-03 14:23 ` Suzuki K Poulose
2026-03-03 14:37 ` Marc Zyngier
2026-03-03 16:02 ` Suzuki K Poulose
2026-03-03 13:11 ` Marc Zyngier
2026-03-04 12:08 ` Steven Price
2026-03-11 19:10 ` Marc Zyngier
2026-03-12 9:28 ` Suzuki K Poulose
2026-03-12 9:39 ` Marc Zyngier
2026-03-12 10:45 ` Steven Price
2025-12-17 10:10 ` [PATCH v12 07/46] arm64: RMI: Basic infrastructure for creating a realm Steven Price
2025-12-17 10:10 ` [PATCH v12 08/46] kvm: arm64: Don't expose unsupported capabilities for realm guests Steven Price
2025-12-17 10:10 ` [PATCH v12 09/46] KVM: arm64: Allow passing machine type in KVM creation Steven Price
2025-12-17 10:10 ` [PATCH v12 10/46] arm64: RMI: RTT tear down Steven Price
2025-12-17 10:10 ` [PATCH v12 11/46] arm64: RMI: Activate realm on first VCPU run Steven Price
2025-12-17 14:29 ` Suzuki K Poulose
2026-03-02 14:40 ` Marc Zyngier
2026-03-02 16:31 ` Steven Price
2025-12-17 10:10 ` [PATCH v12 12/46] arm64: RMI: Allocate/free RECs to match vCPUs Steven Price
2025-12-17 10:10 ` [PATCH v12 13/46] KVM: arm64: vgic: Provide helper for number of list registers Steven Price
2025-12-17 10:10 ` [PATCH v12 14/46] arm64: RMI: Support for the VGIC in realms Steven Price
2025-12-17 10:10 ` [PATCH v12 15/46] KVM: arm64: Support timers in realm RECs Steven Price
2025-12-17 10:10 ` [PATCH v12 16/46] arm64: RMI: Handle realm enter/exit Steven Price
2025-12-17 10:10 ` [PATCH v12 17/46] arm64: RMI: Handle RMI_EXIT_RIPAS_CHANGE Steven Price
2025-12-17 10:10 ` [PATCH v12 18/46] KVM: arm64: Handle realm MMIO emulation Steven Price
2025-12-17 10:10 ` [PATCH v12 19/46] KVM: arm64: Expose support for private memory Steven Price
2025-12-20 13:46 ` kernel test robot
2025-12-20 13:59 ` kernel test robot
2025-12-20 14:18 ` kernel test robot
2025-12-17 10:10 ` [PATCH v12 20/46] arm64: RMI: Allow populating initial contents Steven Price
2025-12-20 14:34 ` kernel test robot
2026-03-02 14:56 ` Marc Zyngier
2026-03-02 16:46 ` Steven Price
2025-12-17 10:10 ` [PATCH v12 21/46] arm64: RMI: Set RIPAS of initial memslots Steven Price
2025-12-17 10:10 ` [PATCH v12 22/46] arm64: RMI: Create the realm descriptor Steven Price
2026-01-23 18:57 ` Alper Gun
2026-01-26 9:50 ` Steven Price
2025-12-17 10:11 ` [PATCH v12 23/46] arm64: RMI: Add a VMID allocator for realms Steven Price
2025-12-17 10:11 ` [PATCH v12 24/46] arm64: RMI: Runtime faulting of memory Steven Price
2025-12-17 10:11 ` [PATCH v12 25/46] KVM: arm64: Handle realm VCPU load Steven Price
2025-12-17 10:11 ` [PATCH v12 26/46] KVM: arm64: Validate register access for a Realm VM Steven Price
2025-12-17 10:11 ` [PATCH v12 27/46] KVM: arm64: Handle Realm PSCI requests Steven Price
2026-03-02 16:39 ` Marc Zyngier
2026-03-03 9:26 ` Suzuki K Poulose
2026-03-03 13:04 ` Marc Zyngier
2025-12-17 10:11 ` [PATCH v12 28/46] KVM: arm64: WARN on injected undef exceptions Steven Price
2025-12-17 10:11 ` [PATCH v12 29/46] arm64: Don't expose stolen time for realm guests Steven Price
2025-12-17 10:11 ` [PATCH v12 30/46] arm64: RMI: allow userspace to inject aborts Steven Price
2025-12-17 10:11 ` [PATCH v12 31/46] arm64: RMI: support RSI_HOST_CALL Steven Price
2025-12-17 10:11 ` [PATCH v12 32/46] arm64: RMI: Allow checking SVE on VM instance Steven Price
2025-12-17 10:11 ` [PATCH v12 33/46] arm64: RMI: Always use 4k pages for realms Steven Price
2025-12-17 10:11 ` [PATCH v12 34/46] arm64: RMI: Prevent Device mappings for Realms Steven Price
2025-12-17 10:11 ` [PATCH v12 35/46] HACK: Restore per-CPU cpu_armpmu pointer Steven Price
2025-12-17 10:11 ` [PATCH v12 36/46] arm_pmu: Provide a mechanism for disabling the physical IRQ Steven Price
2025-12-17 10:11 ` [PATCH v12 37/46] arm64: RMI: Enable PMU support with a realm guest Steven Price
2025-12-17 10:11 ` [PATCH v12 38/46] arm64: RMI: Propagate number of breakpoints and watchpoints to userspace Steven Price
2025-12-17 10:11 ` [PATCH v12 39/46] arm64: RMI: Set breakpoint parameters through SET_ONE_REG Steven Price
2025-12-17 10:11 ` [PATCH v12 40/46] arm64: RMI: Initialize PMCR.N with number counter supported by RMM Steven Price
2025-12-17 10:11 ` [PATCH v12 41/46] arm64: RMI: Propagate max SVE vector length from RMM Steven Price
2025-12-17 10:11 ` [PATCH v12 42/46] arm64: RMI: Configure max SVE vector length for a Realm Steven Price
2025-12-17 10:11 ` [PATCH v12 43/46] arm64: RMI: Provide register list for unfinalized RMI RECs Steven Price
2025-12-17 10:11 ` [PATCH v12 44/46] arm64: RMI: Provide accurate register list Steven Price
2025-12-17 10:11 ` [PATCH v12 45/46] KVM: arm64: Expose KVM_ARM_VCPU_REC to user space Steven Price
2025-12-17 10:11 ` [PATCH v12 46/46] arm64: RMI: Enable realms to be created Steven Price
2025-12-17 14:55 ` [PATCH v12 00/46] arm64: Support for Arm CCA in KVM Marc Zyngier
2025-12-17 15:28 ` Steven Price
2026-02-12 17:48 ` Mathieu Poirier
2026-02-16 12:33 ` Steven Price
2026-02-16 14:27 ` Steven Price
2026-02-17 17:47 ` Mathieu Poirier
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