From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail11.truemail.it (mail11.truemail.it [217.194.8.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D732F30E0C0 for ; Fri, 19 Dec 2025 10:29:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.194.8.81 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766140153; cv=none; b=E3bebkzlFa7ClwEd6aD2QeD+4a0eZtHj5RLScgoiER9+kVSPXYgYkZn6rIC6yLrYaf9l2GUK23ke7HfbFdWaUhzLZ4zt1Y7ifs4U6/x6ArpncaMz57I5RhqwJmEgZCcrb/qhnHfdJtx2Za7wsfOAAApry2S1MGrujtoH77N95wg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766140153; c=relaxed/simple; bh=6tGucxppR5+0krZ38wBm8Wj9LwoAzToDIlnmT0QIbGQ=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=apbl6X4qvBF7Pw/1yYVDmLnr+tauyJGsmXFUV2FNw7RTVuOlb+zBP7GFL5UA4vAyYSGfEOv7UMETbXY1TMH6g7fbj6koPwdixA+AKlRRxUspavZsTKQ24YmkBS4CHY40UGKETw0FHAYjuR3dOx8AkjwNLCcvfK7EI2g8WQpaWGo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it; spf=pass smtp.mailfrom=dolcini.it; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b=d4/pmGlf; arc=none smtp.client-ip=217.194.8.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=dolcini.it Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b="d4/pmGlf" Received: from francesco-nb (93-49-2-63.ip317.fastwebnet.it [93.49.2.63]) by mail11.truemail.it (Postfix) with ESMTPA id 588FB1FA97; Fri, 19 Dec 2025 11:29:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dolcini.it; s=default; t=1766140148; bh=3M+i0ka5MgmLUh1TscMPlMfUsSIIggzwq8KcUgx5iY8=; h=From:To:Subject; b=d4/pmGlfMEWJB+KN+0gRHGEFj4qLfp3/pkUHcIkYcJwbYb0o/vqwvYU7IfjBSrG2h OneM4Y96S1KablTtJTj7xQfnuxLQ/73HfH+o2GszEg34kkNHHzxNc3ruNeKlO4Hwxy rSFkwoBXfxYEyVYFGMxoqmzLiiKcxVjeo/EPkjLO2FZjruQAYI1iPM++GgBH3V3x0B ONnd9+up6q4WBRvcRn5i7hWu+yCZI8Pc/+iH6VUv5kBIQQ1tzXqbZ+EDomxH4z7RTk JolV6MtuZBgpKrK/6Ng91yCuEo9eVpX/tEz3zKA9Mhml5UH+qHYpbI1QYvhqmEL+z+ NQVZ2KaUJF7Ig== Date: Fri, 19 Dec 2025 11:29:07 +0100 From: Francesco Dolcini To: Tomi Valkeinen Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Parth Pancholi , Francesco Dolcini , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/7] drm/bridge: tc358768: Separate indirect register writes Message-ID: <20251219102907.GC39796@francesco-nb> References: <20251021-tc358768-v1-0-d590dc6a1a0c@ideasonboard.com> <20251021-tc358768-v1-3-d590dc6a1a0c@ideasonboard.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251021-tc358768-v1-3-d590dc6a1a0c@ideasonboard.com> On Tue, Oct 21, 2025 at 04:22:59PM +0300, Tomi Valkeinen wrote: > Some registers can only be written indirectly, using DSI_CONFW register. > We don't have many uses for those registers (in fact, only DSI_CONTROL > is currently written), but the code to do those writes inline is a bit > confusing. > > Add a new function, tc358768_confw_update_bits() which can be used to > write the bits indirectly. Only DSI_CONTROL is currently supported. > > Signed-off-by: Tomi Valkeinen Reviewed-by: Francesco Dolcini