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Sat, 27 Dec 2025 09:57:35 -0800 (PST) Received: from localhost.localdomain ([2a02:a31b:20c3:6680:3d12:d2ea:4ee0:347a]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8037de1421sm2793889166b.41.2025.12.27.09.57.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Dec 2025 09:57:34 -0800 (PST) From: Dmytro Maluka To: David Woodhouse , Lu Baolu , iommu@lists.linux.dev Cc: Joerg Roedel , Will Deacon , Robin Murphy , linux-kernel@vger.kernel.org, "Vineeth Pillai (Google)" , Aashish Sharma , Grzegorz Jaszczyk , Chuanxiao Dong , Kevin Tian , Dmytro Maluka Subject: [PATCH v2 0/5] iommu/vt-d: Ensure memory ordering in context & root entry updates Date: Sat, 27 Dec 2025 18:57:23 +0100 Message-ID: <20251227175728.4358-1-dmaluka@chromium.org> X-Mailer: git-send-email 2.47.3 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit As discussed in [1], we don't currently prevent the compiler from reordering memory writes when updating context entries, which is potentially dangerous, as it may cause setting the present bit (i.e. enabling DMA translation for the given device) before finishing setting up other bits in the context entry (and thus creating a time window when a DMA from the device may result in an unpredicted behavior). Fix this in the same way as how this is already addressed for PASID entries, i.e. by using READ_ONCE/WRITE_ONCE in the helpers used for setting individual bits in context entries, so that memory writes done by those helpers are ordered in relation to each other (plus, prevent load/store tearing and so on). While at it, similarly paranoidally fix updating root entries as well: use WRITE_ONCE to make sure that the present bit is set atomically together with the context table address bits, not before them. [1] https://lore.kernel.org/all/aTG7gc7I5wExai3S@google.com/ v1 -> v2: - Sanitize bits to not exceed the mask (suggested by Baolu) - Reuse pasid_set_bits() for context entries as well (rename it to entry_set_bits()) - Add extra barrier in *_set_present() (suggested by Baolu) Dmytro Maluka (5): iommu/vt-d: Sanitize set bits in pasid_set_bits() iommu/vt-d: Generalize pasid_set_bits() iommu/vt-d: Ensure memory ordering in context entry updates iommu/vt-d: Use smp_wmb() before setting context/pasid present bit iommu/vt-d: Use WRITE_ONCE for setting root table entries drivers/iommu/intel/iommu.c | 2 +- drivers/iommu/intel/iommu.h | 49 +++++++++++++++++++++++++------------ drivers/iommu/intel/pasid.c | 3 ++- drivers/iommu/intel/pasid.h | 46 +++++++++++++++++----------------- 4 files changed, 59 insertions(+), 41 deletions(-) -- 2.47.3