From: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
To: "Jingoo Han" <jingoohan1@gmail.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Frank Li" <Frank.Li@nxp.com>,
"Serge Semin" <Sergey.Semin@baikalelectronics.ru>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
macro@orcam.me.uk,
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>,
stable@vger.kernel.org
Subject: [PATCH v2 1/3] PCI: dwc: Fix skipped index 0 in outbound ATU setup
Date: Mon, 29 Dec 2025 16:12:41 +0530 [thread overview]
Message-ID: <20251229-ecam_io_fix-v2-1-41a0e56a6faa@oss.qualcomm.com> (raw)
In-Reply-To: <20251229-ecam_io_fix-v2-0-41a0e56a6faa@oss.qualcomm.com>
In dw_pcie_iatu_setup(), the outbound ATU loop uses a pre-increment
on the index and starts programming from 1, effectively skipping
index 0. This results in the first outbound window never being
configured.
Update the logic to start from index 0 and use post-increment (i++)
when assigning atu.index.
Fixes: ce06bf570390f ("PCI: dwc: Check iATU in/outbound range setup status")
Cc: stable@vger.kernel.org
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
Note:- The fix tag shown above is for applying this patch cleanly,
further below versions we need to manually apply them, If any one
intrested to apply this fix then we can submit another patch based on
that kernel version.
---
drivers/pci/controller/dwc/pcie-designware-host.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index e92513c5bda51bde3a7157033ddbd73afa370d78..32a26458ed8f1696fe2fdcf9df6b795c4c761f1f 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -896,10 +896,10 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
if (resource_type(entry->res) != IORESOURCE_MEM)
continue;
- if (pci->num_ob_windows <= ++i)
+ if (pci->num_ob_windows < i)
break;
- atu.index = i;
+ atu.index = i++;
atu.type = PCIE_ATU_TYPE_MEM;
atu.parent_bus_addr = entry->res->start - pci->parent_bus_offset;
atu.pci_addr = entry->res->start - entry->offset;
@@ -920,7 +920,7 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
}
if (pp->io_size) {
- if (pci->num_ob_windows > ++i) {
+ if (pci->num_ob_windows > i) {
atu.index = i;
atu.type = PCIE_ATU_TYPE_IO;
atu.parent_bus_addr = pp->io_base - pci->parent_bus_offset;
--
2.34.1
next prev parent reply other threads:[~2025-12-29 10:42 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-29 10:42 [PATCH v2 0/3] PCI: dwc: Fix missing iATU setup when ECAM is enabled Krishna Chaitanya Chundru
2025-12-29 10:42 ` Krishna Chaitanya Chundru [this message]
2026-01-22 15:02 ` [PATCH v2 1/3] PCI: dwc: Fix skipped index 0 in outbound ATU setup Niklas Cassel
2026-01-22 18:16 ` Maciej W. Rozycki
2026-01-22 21:19 ` Niklas Cassel
2026-01-23 20:35 ` Maciej W. Rozycki
2025-12-29 10:42 ` [PATCH v2 2/3] PCI: dwc: Correct iATU index increment for MSG TLP region Krishna Chaitanya Chundru
2025-12-29 10:42 ` [PATCH v2 3/3] PCI: dwc: Fix missing iATU setup when ECAM is enabled Krishna Chaitanya Chundru
2026-01-22 21:33 ` Niklas Cassel
2026-01-22 21:57 ` Niklas Cassel
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