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[163.131.201.140]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a2f3d4cb25sm432327535ad.56.2026.01.04.06.00.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Jan 2026 06:00:07 -0800 (PST) From: Naohiko Shimizu To: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu Cc: alex@ghiti.fr, anup@brainfault.org, atish.patra@linux.dev, daniel.lezcano@linaro.org, tglx@linutronix.de, nick.hu@sifive.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, Naohiko Shimizu Subject: [PATCH v3 0/3] riscv: fix timer update hazards on RV32 Date: Sun, 4 Jan 2026 22:59:35 +0900 Message-Id: <20260104135938.524-1-naohiko.shimizu@gmail.com> X-Mailer: git-send-email 2.39.5 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This patch series fixes timer register update hazards on RV32 for clocksource, KVM, and suspend/resume paths by adopting the 3-step update sequence recommended by the RISC-V Privileged Specification. Changes in v3: - Dropped redundant subject line from commit descriptions. - Added Fixes tags for all patches. - Moved Signed-off-by tags to the end of commit messages. Changes in v2: - Added detailed architectural background to commit messages. - Added KVM and suspend/resume cases. Naohiko Shimizu (3): riscv: clocksource: Fix stimecmp update hazard on RV32 riscv: kvm: Fix vstimecmp update hazard on RV32 riscv: suspend: Fix stimecmp update hazard on RV32 arch/riscv/kernel/suspend.c | 3 ++- arch/riscv/kvm/vcpu_timer.c | 6 ++++-- drivers/clocksource/timer-riscv.c | 3 ++- 3 files changed, 8 insertions(+), 4 deletions(-) -- 2.39.5