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[142.162.112.119]) by smtp.gmail.com with ESMTPSA id af79cd13be357-8c37f4bc1e7sm60549685a.21.2026.01.05.16.14.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jan 2026 16:14:18 -0800 (PST) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1vcuiI-00000001EGE-05sB; Mon, 05 Jan 2026 20:14:18 -0400 Date: Mon, 5 Jan 2026 20:14:18 -0400 From: Jason Gunthorpe To: Dmytro Maluka Cc: David Woodhouse , Lu Baolu , iommu@lists.linux.dev, Joerg Roedel , Will Deacon , Robin Murphy , linux-kernel@vger.kernel.org, "Vineeth Pillai (Google)" , Aashish Sharma , Grzegorz Jaszczyk , Chuanxiao Dong , Kevin Tian Subject: Re: [PATCH v2 0/5] iommu/vt-d: Ensure memory ordering in context & root entry updates Message-ID: <20260106001418.GK125261@ziepe.ca> References: <20251227175728.4358-1-dmaluka@chromium.org> <20260105181200.GH125261@ziepe.ca> <20260105191410.GJ125261@ziepe.ca> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Mon, Jan 05, 2026 at 09:05:36PM +0100, Dmytro Maluka wrote: > > and WRITE_ONCE is pointless if the HW is promising not to > > read it due to non-present. > > As long as we use a barrier. And IIUC vice versa, if we use WRITE_ONCE > for any updates, a barrier is not necessary (on x86). And WRITE_ONCE for > any updates (for PASID entries) is what was already done before this > series. That is an x86 ism and it shouldn't be needlessly leaked into drivers. As this is not performance it should have the portable flow: WRITE_ONCE(non-present) dma_wmb() [..] dma_wmb() WRITE_ONCE(present) So, it seems to me like all you need here is the one line to add the dma_wmb() prior to setting present. > Although, perhaps even with a barrier, WRITE_ONCE is still desirable to > prevent the compiler from doing strange but legal things that involve > transiently setting and then clearing the present bit behind our back? > (Not that I'm aware of any compilers doing that, but I'm no compiler > expert.) You do have to write once the present bit, but not the others. The dma_wmb() will make sure the HW cannot observe other states when it observes present. Jason