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(unknown [IPv6:2a01:e0a:120:3210:7e36:2305:d47f:6e43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by bali.collaboradmins.com (Postfix) with ESMTPSA id 759BA17E368C; Wed, 7 Jan 2026 11:10:17 +0100 (CET) From: Benjamin Gaignard To: joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, nicolas.dufresne@collabora.com, p.zabel@pengutronix.de, mchehab@kernel.org Cc: iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-media@vger.kernel.org, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v11 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame Date: Wed, 7 Jan 2026 11:09:55 +0100 Message-ID: <20260107101005.84039-6-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260107101005.84039-1-benjamin.gaignard@collabora.com> References: <20260107101005.84039-1-benjamin.gaignard@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit AV1 is a stateless decoder which means multiple AV1 bitstreams could be decoded at the same time using the same hardware block. Before decoding a frame it is needed to restore the iommu tables to avoid mixing decode contexts. Signed-off-by: Benjamin Gaignard Reviewed-by: Nicolas Dufresne --- .../verisilicon/rockchip_vpu981_hw_av1_dec.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c index e4703bb6be7c..d9e68e0ded68 100644 --- a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c +++ b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c @@ -5,6 +5,9 @@ * Author: Benjamin Gaignard */ +#include +#include + #include #include "hantro.h" #include "hantro_v4l2.h" @@ -2095,12 +2098,24 @@ rockchip_vpu981_av1_dec_set_output_buffer(struct hantro_ctx *ctx) hantro_write_addr(vpu, AV1_TILE_OUT_MV, mv_addr); } +static void rockchip_vpu981_av1_restore_iommu(struct hantro_ctx *ctx) +{ + struct iommu_domain *domain; + + /* Before decoding any frame iommu context need to be restored */ + domain = iommu_get_domain_for_dev(ctx->dev->v4l2_dev.dev); + if (domain) + vsi_iommu_restore_ctx(domain); +} + int rockchip_vpu981_av1_dec_run(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; struct vb2_v4l2_buffer *vb2_src; int ret; + rockchip_vpu981_av1_restore_iommu(ctx); + hantro_start_prepare_run(ctx); ret = rockchip_vpu981_av1_dec_prepare_run(ctx); -- 2.43.0