From: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
mani@kernel.org,
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Subject: [PATCH] PCI: Add ACS quirk for Qualcomm Hamoa & Glymur
Date: Fri, 09 Jan 2026 13:53:32 +0530 [thread overview]
Message-ID: <20260109-acs_quirk-v1-1-82adf95a89ae@oss.qualcomm.com> (raw)
The Qualcomm Hamoa & Glymur root ports don't advertise an ACS capability,
but they do provide ACS-like features to disable peer transactions and
validate bus numbers in requests.
So add an ACS quirk for Hamoa & Glymur.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
drivers/pci/quirks.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index b9c252aa6fe08a864cebe245f5dd7bf41fcc5116..75dee46f474a643cc79d112df1f5a57a9f6b95b1 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -5107,6 +5107,10 @@ static const struct pci_dev_acs_enabled {
{ PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs },
/* QCOM SA8775P root port */
{ PCI_VENDOR_ID_QCOM, 0x0115, pci_quirk_qcom_rp_acs },
+ /* QCOM Hamoa root port */
+ { PCI_VENDOR_ID_QCOM, 0x0111, pci_quirk_qcom_rp_acs },
+ /* QCOM Glymur root port */
+ { PCI_VENDOR_ID_QCOM, 0x0120, pci_quirk_qcom_rp_acs },
/* HXT SD4800 root ports. The ACS design is same as QCOM QDF2xxx */
{ PCI_VENDOR_ID_HXT, 0x0401, pci_quirk_qcom_rp_acs },
/* Intel PCH root ports */
---
base-commit: 623fb9912f6af600cda3b6bd166ac738c1115ef4
change-id: 20260109-acs_quirk-0f8e83dc945e
Best regards,
--
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
next reply other threads:[~2026-01-09 8:23 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-09 8:23 Krishna Chaitanya Chundru [this message]
2026-01-09 15:58 ` Bjorn Helgaas
2026-01-21 14:23 ` Manivannan Sadhasivam
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