From: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH RFC] arm64: dts: qcom: qcs6490-rb3gen2: power on onboard uPD720201 controller
Date: Fri, 09 Jan 2026 17:30:24 +0200 [thread overview]
Message-ID: <20260109-rb3gen2-upd720201-v1-1-50d9b22dbc2a@oss.qualcomm.com> (raw)
One of ports of the TC9563 bridge is connected to the PCIe Renesas host
controller. Specify the voltage regulator, powering on the USB host
controller.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
Note, with these changes I can't get the onboard hub / ASIX controller
to work. Most likely those need to be powered on separately, but my
quick attempts to do it failed up to now.
---
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
index e3d2f01881ae..ddb5a381b724 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
@@ -217,6 +217,17 @@ pmic_glink_sbu_in: endpoint {
};
};
+ vreg_pcie0_3v3: regulator-pcie0-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "PCIE0-3V3";
+ gpio = <&pm7250b_gpios 1 GPIO_ACTIVE_HIGH>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ pinctrl-0 = <&pcie0_3v3_en>;
+ pinctrl-names = "default";
+ };
+
vph_pwr: regulator-vph-pwr {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
@@ -807,6 +818,8 @@ &pcie1 {
pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>, <&pcie1_clkreq_n>;
pinctrl-names = "default";
+ vddpe-3v3-supply = <&vreg_pcie0_3v3>;
+
iommu-map = <0x0 &apps_smmu 0x1c80 0x1>,
<0x100 &apps_smmu 0x1c81 0x1>,
<0x208 &apps_smmu 0x1c84 0x1>,
@@ -1378,6 +1391,16 @@ &edp_hot_plug_det {
};
&pm7250b_gpios {
+ pcie0_3v3_en: pcie0-3v3-en-state {
+ pins = "gpio1";
+ function = "normal";
+
+ bias-disable;
+ input-disable;
+ output-enable;
+ power-source = <0>;
+ };
+
lt9611_rst_pin: lt9611-rst-state {
pins = "gpio2";
function = "normal";
---
base-commit: b74f0330d6283319451a0ef818ef50bf2805d875
change-id: 20260108-rb3gen2-upd720201-8acc1c083778
Best regards,
--
With best wishes
Dmitry
next reply other threads:[~2026-01-09 15:30 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-09 15:30 Dmitry Baryshkov [this message]
2026-01-13 15:00 ` Konrad Dybcio
2026-01-15 1:28 ` Dmitry Baryshkov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260109-rb3gen2-upd720201-v1-1-50d9b22dbc2a@oss.qualcomm.com \
--to=dmitry.baryshkov@oss.qualcomm.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®