From: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: aiqun.yu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com,
trilok.soni@oss.qualcomm.com, yijie.yang@oss.qualcomm.com,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Jingyi Wang <jingyi.wang@oss.qualcomm.com>,
20260114-knp-remoteproc-v4-0-fcf0b04d01af@oss.qualcomm.com,
Kumari Pallavi <kumari.pallavi@oss.qualcomm.com>
Subject: [PATCH v3 04/10] arm64: dts: qcom: kaanapali: Add ADSP and CDSP for Kaanapali SoC
Date: Wed, 14 Jan 2026 22:49:06 -0800 [thread overview]
Message-ID: <20260114-knp-dts-misc-v3-4-a6cc9e45de93@oss.qualcomm.com> (raw)
In-Reply-To: <20260114-knp-dts-misc-v3-0-a6cc9e45de93@oss.qualcomm.com>
Add remoteproc PAS loader for ADSP and CDSP with its SMP2P and fastrpc
nodes.
Co-developed-by: Kumari Pallavi <kumari.pallavi@oss.qualcomm.com>
Signed-off-by: Kumari Pallavi <kumari.pallavi@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/kaanapali.dtsi | 351 ++++++++++++++++++++++++++++++++
1 file changed, 351 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
index c736cebbf597..d344eb376ee4 100644
--- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi
+++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
@@ -443,6 +443,95 @@ rmtfs_mem: rmtfs@d7c00000 {
};
};
+ smp2p-adsp {
+ compatible = "qcom,smp2p";
+
+ interrupts-extended = <&ipcc IPCC_MPROC_LPASS
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+
+ mboxes = <&ipcc IPCC_MPROC_LPASS
+ IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,smem = <443>, <429>;
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <2>;
+
+ smp2p_adsp_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_adsp_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-cdsp {
+ compatible = "qcom,smp2p";
+
+ interrupts-extended = <&ipcc IPCC_MPROC_CDSP
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+
+ mboxes = <&ipcc IPCC_MPROC_CDSP
+ IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,smem = <94>, <432>;
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <5>;
+
+ smp2p_cdsp_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_cdsp_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-modem {
+ compatible = "qcom,smp2p";
+
+ interrupts-extended = <&ipcc IPCC_MPROC_MPSS
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+
+ mboxes = <&ipcc IPCC_MPROC_MPSS
+ IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,smem = <435>, <428>;
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <1>;
+
+ smp2p_modem_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_modem_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ ipa_smp2p_out: ipa-ap-to-modem {
+ qcom,entry-name = "ipa";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ ipa_smp2p_in: ipa-modem-to-ap {
+ qcom,entry-name = "ipa";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
soc: soc@0 {
compatible = "simple-bus";
@@ -2478,6 +2567,111 @@ tcsr: clock-controller@1fc0000 {
#reset-cells = <1>;
};
+ remoteproc_adsp: remoteproc@6800000 {
+ compatible = "qcom,kaanapali-adsp-pas", "qcom,sm8550-adsp-pas";
+ reg = <0x0 0x06800000 0x0 0x10000>;
+
+ interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack",
+ "shutdown-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+
+ power-domains = <&rpmhpd RPMHPD_LCX>,
+ <&rpmhpd RPMHPD_LMX>;
+ power-domain-names = "lcx",
+ "lmx";
+
+ memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_adsp_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ remoteproc_adsp_glink: glink-edge {
+ interrupts-extended = <&ipcc IPCC_MPROC_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+
+ mboxes = <&ipcc IPCC_MPROC_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ qcom,remote-pid = <2>;
+
+ label = "lpass";
+
+ fastrpc {
+ compatible = "qcom,kaanapali-fastrpc";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ label = "adsp";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb@3 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+
+ iommus = <&apps_smmu 0x1003 0x80>,
+ <&apps_smmu 0x1043 0x20>;
+ dma-coherent;
+ };
+
+ compute-cb@4 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <4>;
+
+ iommus = <&apps_smmu 0x1004 0x80>,
+ <&apps_smmu 0x1044 0x20>;
+ dma-coherent;
+ };
+
+ compute-cb@5 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <5>;
+
+ iommus = <&apps_smmu 0x1005 0x80>,
+ <&apps_smmu 0x1045 0x20>;
+ dma-coherent;
+ };
+
+ compute-cb@6 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <6>;
+
+ iommus = <&apps_smmu 0x1006 0x80>,
+ <&apps_smmu 0x1046 0x20>;
+ dma-coherent;
+ };
+
+ compute-cb@7 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <7>;
+
+ iommus = <&apps_smmu 0x1007 0x40>,
+ <&apps_smmu 0x1067 0x0>,
+ <&apps_smmu 0x1087 0x0>;
+ dma-coherent;
+ };
+ };
+ };
+ };
+
lpass_lpiaon_noc: interconnect@7400000 {
compatible = "qcom,kaanapali-lpass-lpiaon-noc";
reg = <0x0 0x07400000 0x0 0x19080>;
@@ -4760,6 +4954,163 @@ nsp_noc: interconnect@260c0000 {
#interconnect-cells = <2>;
};
+ remoteproc_cdsp: remoteproc@26300000 {
+ compatible = "qcom,kaanapali-cdsp-pas", "qcom,sm8550-cdsp-pas";
+ reg = <0x0 0x26300000 0x0 0x10000>;
+
+ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack",
+ "shutdown-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ interconnects = <&nsp_noc MASTER_CDSP_PROC QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+
+ power-domains = <&rpmhpd RPMHPD_CX>,
+ <&rpmhpd RPMHPD_MXC>,
+ <&rpmhpd RPMHPD_NSP>;
+ power-domain-names = "cx",
+ "mxc",
+ "nsp";
+
+ memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>;
+ qcom,qmp = <&aoss_qmp>;
+ qcom,smem-states = <&smp2p_cdsp_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_MPROC_CDSP
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_MPROC_CDSP
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+ qcom,remote-pid = <5>;
+ label = "cdsp";
+
+ fastrpc {
+ compatible = "qcom,kaanapali-fastrpc";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ label = "cdsp";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb@1 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <1>;
+ iommus = <&apps_smmu 0x19c1 0x0>,
+ <&apps_smmu 0x1961 0x0>,
+ <&apps_smmu 0x0c21 0x0>,
+ <&apps_smmu 0x0c01 0x40>;
+ dma-coherent;
+ };
+
+ compute-cb@2 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <2>;
+ iommus = <&apps_smmu 0x1962 0x0>,
+ <&apps_smmu 0x0c02 0x20>,
+ <&apps_smmu 0x0c42 0x0>,
+ <&apps_smmu 0x19c2 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@3 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+ iommus = <&apps_smmu 0x1963 0x0>,
+ <&apps_smmu 0x0c23 0x0>,
+ <&apps_smmu 0x0c03 0x40>,
+ <&apps_smmu 0x19c3 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@4 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <4>;
+ iommus = <&apps_smmu 0x1964 0x0>,
+ <&apps_smmu 0x0c44 0x0>,
+ <&apps_smmu 0x0c04 0x20>,
+ <&apps_smmu 0x19c4 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@5 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <5>;
+ iommus = <&apps_smmu 0x1965 0x0>,
+ <&apps_smmu 0x0c45 0x0>,
+ <&apps_smmu 0x0c05 0x20>,
+ <&apps_smmu 0x19c5 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@6 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <6>;
+ iommus = <&apps_smmu 0x1966 0x0>,
+ <&apps_smmu 0x0c06 0x20>,
+ <&apps_smmu 0x0c46 0x0>,
+ <&apps_smmu 0x19c6 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@7 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <7>;
+ iommus = <&apps_smmu 0x1967 0x0>,
+ <&apps_smmu 0x0c27 0x0>,
+ <&apps_smmu 0x0c07 0x40>,
+ <&apps_smmu 0x19c7 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@8 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <8>;
+ iommus = <&apps_smmu 0x1968 0x0>,
+ <&apps_smmu 0x0c08 0x20>,
+ <&apps_smmu 0x0c48 0x0>,
+ <&apps_smmu 0x19c8 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@12 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <12>;
+ iommus = <&apps_smmu 0x196c 0x0>,
+ <&apps_smmu 0x0c2c 0x00>,
+ <&apps_smmu 0x0c0c 0x40>,
+ <&apps_smmu 0x19cc 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@13 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <13>;
+ iommus = <&apps_smmu 0x196d 0x0>,
+ <&apps_smmu 0x0c0d 0x40>,
+ <&apps_smmu 0x0c2e 0x0>,
+ <&apps_smmu 0x0c2d 0x0>,
+ <&apps_smmu 0x19cd 0x0>;
+ dma-coherent;
+ };
+ };
+ };
+ };
+
/* Cluster 0 */
pmu@310b3400 {
compatible = "qcom,kaanapali-cpu-bwmon", "qcom,sdm845-bwmon";
--
2.25.1
next prev parent reply other threads:[~2026-01-15 6:49 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-15 6:49 [PATCH v3 00/10] arm64: dts: qcom: kaanapali: Add more features Jingyi Wang
2026-01-15 6:49 ` [PATCH v3 01/10] arm64: dts: qcom: kaanapali: add coresight nodes Jingyi Wang
2026-01-15 6:49 ` [PATCH v3 02/10] arm64: dts: qcom: kaanapali: Add QUPv3 configuration for serial engines Jingyi Wang
2026-01-15 7:06 ` Dmitry Baryshkov
2026-01-15 6:49 ` [PATCH v3 03/10] arm64: dts: qcom: kaanapali: Add TSENS and thermal zones Jingyi Wang
2026-01-15 7:09 ` Dmitry Baryshkov
2026-01-15 10:22 ` Konrad Dybcio
2026-01-15 20:42 ` Dmitry Baryshkov
2026-01-22 12:32 ` Manaf Meethalavalappu Pallikunhi
2026-01-15 6:49 ` Jingyi Wang [this message]
2026-01-15 7:10 ` [PATCH v3 04/10] arm64: dts: qcom: kaanapali: Add ADSP and CDSP for Kaanapali SoC Dmitry Baryshkov
2026-01-16 3:04 ` Jingyi Wang
2026-01-15 6:49 ` [PATCH v3 05/10] arm64: dts: qcom: kaanapali: Add support for audio Jingyi Wang
2026-01-15 7:12 ` Dmitry Baryshkov
2026-01-16 3:05 ` Jingyi Wang
2026-01-15 6:49 ` [PATCH v3 06/10] arm64: dts: qcom: kaanapali-mtp: Enable ADSP and CDSP Jingyi Wang
2026-01-15 7:13 ` Dmitry Baryshkov
2026-01-15 6:49 ` [PATCH v3 07/10] arm64: dts: qcom: kaanapali-qrd: " Jingyi Wang
2026-01-15 7:13 ` Dmitry Baryshkov
2026-01-15 6:49 ` [PATCH v3 08/10] arm64: dts: qcom: kaanapali-mtp: Add audio support (WSA8845, WCD9395, DMIC) Jingyi Wang
2026-01-15 7:15 ` Dmitry Baryshkov
2026-01-16 3:05 ` Jingyi Wang
2026-01-15 6:49 ` [PATCH v3 09/10] arm64: dts: qcom: kaanapali: Add support for MM clock controllers for Kaanapali Jingyi Wang
2026-01-15 7:19 ` Dmitry Baryshkov
2026-01-15 16:46 ` Taniya Das
2026-01-15 6:49 ` [PATCH v3 10/10] arm64: defconfig: Enable Kaanapali clock controllers Jingyi Wang
2026-01-15 7:20 ` Dmitry Baryshkov
2026-01-15 16:47 ` Taniya Das
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