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[217.128.226.200]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47f941a670dsm3098195e9.5.2026.01.14.14.12.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 14 Jan 2026 14:12:12 -0800 (PST) From: "benoit.masson" To: Jean Delvare , Guenter Roeck Cc: linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Corbet , linux-doc@vger.kernel.org, "benoit.masson" Subject: [PATCH v4 0/5] hwmon: it87: add IT8613E support Date: Wed, 14 Jan 2026 23:12:05 +0100 Message-ID: <20260114221210.98071-1-yahoo@perenite.com> X-Mailer: git-send-email 2.50.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series ports IT8613E support from the out-of-tree it87 fork into upstream in small steps. It first adds per-chip resource metadata and new PWM temp map handling, then expands temp limits/offsets, adds IT8613E detection, and finally the IT8613E configuration. Tested on: IT8613E, MEDION B660H7-M20 BIOS motherboard. Builds: each patch builds cleanly with W=1 (the only checkpatch warnings are the kept symbolic perms S_IRUGO | S_IWUSR / S_IRUGO). Changes in v4: - Drop FEAT_TEMP_OFFSET and has_temp_offset(); rely on num_temp_offset. - Initialize num_temp_limit/offset/map for all chips, no runtime defaults. - Use per-chip reg_pwm pointer instead of type checks; fixes compile error. - Keep IT8613E feature set aligned with the above (no FEAT_TEMP_OFFSET). benoit.masson (5): hwmon: it87: describe per-chip temperature resources hwmon: it87: prepare for extended PWM temp maps hwmon: it87: expose additional temperature limits hwmon: it87: add IT8613E identification hwmon: it87: add IT8613E configuration Documentation/hwmon/it87.rst | 8 + drivers/hwmon/it87.c | 447 ++++++++++++++++++++++++++++------- 2 files changed, 376 insertions(+), 79 deletions(-) -- 2.50.1 (Apple Git-155)