From: Manivannan Sadhasivam via B4 Relay <devnull+manivannan.sadhasivam.oss.qualcomm.com@kernel.org>
To: "Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Bartosz Golaszewski" <brgl@bgdev.pl>,
"Bartosz Golaszewski" <brgl@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Jingoo Han" <jingoohan1@gmail.com>
Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, Chen-Yu Tsai <wens@kernel.org>,
Brian Norris <briannorris@chromium.org>,
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>,
Niklas Cassel <cassel@kernel.org>,
Alex Elder <elder@riscstar.com>,
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Subject: [PATCH v5 04/15] PCI/pwrctrl: tc9563: Clean up whitespace
Date: Thu, 15 Jan 2026 12:58:56 +0530 [thread overview]
Message-ID: <20260115-pci-pwrctrl-rework-v5-4-9d26da3ce903@oss.qualcomm.com> (raw)
In-Reply-To: <20260115-pci-pwrctrl-rework-v5-0-9d26da3ce903@oss.qualcomm.com>
From: Bjorn Helgaas <bhelgaas@google.com>
Most of pci-pwrctrl-tc9563.c fits in 80 columns. Wrap lines that are
gratuitously longer. Whitespace changes only.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c | 65 +++++++++++++++++++++-----------
1 file changed, 42 insertions(+), 23 deletions(-)
diff --git a/drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c b/drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c
index 0a63add84d09..efc4d2054bfd 100644
--- a/drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c
+++ b/drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c
@@ -59,7 +59,7 @@
#define TC9563_POWER_CONTROL_OVREN 0x82b2c8
#define TC9563_GPIO_MASK 0xfffffff3
-#define TC9563_GPIO_DEASSERT_BITS 0xc /* Bits to clear for GPIO deassert */
+#define TC9563_GPIO_DEASSERT_BITS 0xc /* Clear to deassert GPIO */
#define TC9563_TX_MARGIN_MIN_UA 400000
@@ -69,7 +69,7 @@
*/
#define TC9563_OSC_STAB_DELAY_US (10 * USEC_PER_MSEC)
-#define TC9563_L0S_L1_DELAY_UNIT_NS 256 /* Each unit represents 256 nanoseconds */
+#define TC9563_L0S_L1_DELAY_UNIT_NS 256 /* Each unit represents 256 ns */
struct tc9563_pwrctrl_reg_setting {
unsigned int offset;
@@ -217,7 +217,8 @@ static int tc9563_pwrctrl_i2c_read(struct i2c_client *client,
}
static int tc9563_pwrctrl_i2c_bulk_write(struct i2c_client *client,
- const struct tc9563_pwrctrl_reg_setting *seq, int len)
+ const struct tc9563_pwrctrl_reg_setting *seq,
+ int len)
{
int ret, i;
@@ -252,12 +253,13 @@ static int tc9563_pwrctrl_disable_port(struct tc9563_pwrctrl_ctx *ctx,
if (ret)
return ret;
- return tc9563_pwrctrl_i2c_bulk_write(ctx->client,
- common_pwroff_seq, ARRAY_SIZE(common_pwroff_seq));
+ return tc9563_pwrctrl_i2c_bulk_write(ctx->client, common_pwroff_seq,
+ ARRAY_SIZE(common_pwroff_seq));
}
static int tc9563_pwrctrl_set_l0s_l1_entry_delay(struct tc9563_pwrctrl_ctx *ctx,
- enum tc9563_pwrctrl_ports port, bool is_l1, u32 ns)
+ enum tc9563_pwrctrl_ports port,
+ bool is_l1, u32 ns)
{
u32 rd_val, units;
int ret;
@@ -269,24 +271,32 @@ static int tc9563_pwrctrl_set_l0s_l1_entry_delay(struct tc9563_pwrctrl_ctx *ctx,
units = ns / TC9563_L0S_L1_DELAY_UNIT_NS;
if (port == TC9563_ETHERNET) {
- ret = tc9563_pwrctrl_i2c_read(ctx->client, TC9563_EMBEDDED_ETH_DELAY, &rd_val);
+ ret = tc9563_pwrctrl_i2c_read(ctx->client,
+ TC9563_EMBEDDED_ETH_DELAY,
+ &rd_val);
if (ret)
return ret;
if (is_l1)
- rd_val = u32_replace_bits(rd_val, units, TC9563_ETH_L1_DELAY_MASK);
+ rd_val = u32_replace_bits(rd_val, units,
+ TC9563_ETH_L1_DELAY_MASK);
else
- rd_val = u32_replace_bits(rd_val, units, TC9563_ETH_L0S_DELAY_MASK);
+ rd_val = u32_replace_bits(rd_val, units,
+ TC9563_ETH_L0S_DELAY_MASK);
- return tc9563_pwrctrl_i2c_write(ctx->client, TC9563_EMBEDDED_ETH_DELAY, rd_val);
+ return tc9563_pwrctrl_i2c_write(ctx->client,
+ TC9563_EMBEDDED_ETH_DELAY,
+ rd_val);
}
- ret = tc9563_pwrctrl_i2c_write(ctx->client, TC9563_PORT_SELECT, BIT(port));
+ ret = tc9563_pwrctrl_i2c_write(ctx->client, TC9563_PORT_SELECT,
+ BIT(port));
if (ret)
return ret;
return tc9563_pwrctrl_i2c_write(ctx->client,
- is_l1 ? TC9563_PORT_L1_DELAY : TC9563_PORT_L0S_DELAY, units);
+ is_l1 ? TC9563_PORT_L1_DELAY : TC9563_PORT_L0S_DELAY,
+ units);
}
static int tc9563_pwrctrl_set_tx_amplitude(struct tc9563_pwrctrl_ctx *ctx,
@@ -321,7 +331,8 @@ static int tc9563_pwrctrl_set_tx_amplitude(struct tc9563_pwrctrl_ctx *ctx,
{TC9563_TX_MARGIN, amp},
};
- return tc9563_pwrctrl_i2c_bulk_write(ctx->client, tx_amp_seq, ARRAY_SIZE(tx_amp_seq));
+ return tc9563_pwrctrl_i2c_bulk_write(ctx->client, tx_amp_seq,
+ ARRAY_SIZE(tx_amp_seq));
}
static int tc9563_pwrctrl_disable_dfe(struct tc9563_pwrctrl_ctx *ctx,
@@ -364,8 +375,8 @@ static int tc9563_pwrctrl_disable_dfe(struct tc9563_pwrctrl_ctx *ctx,
{TC9563_PHY_RATE_CHANGE_OVERRIDE, 0x0},
};
- return tc9563_pwrctrl_i2c_bulk_write(ctx->client,
- disable_dfe_seq, ARRAY_SIZE(disable_dfe_seq));
+ return tc9563_pwrctrl_i2c_bulk_write(ctx->client, disable_dfe_seq,
+ ARRAY_SIZE(disable_dfe_seq));
}
static int tc9563_pwrctrl_set_nfts(struct tc9563_pwrctrl_ctx *ctx,
@@ -381,18 +392,22 @@ static int tc9563_pwrctrl_set_nfts(struct tc9563_pwrctrl_ctx *ctx,
if (!nfts[0])
return 0;
- ret = tc9563_pwrctrl_i2c_write(ctx->client, TC9563_PORT_SELECT, BIT(port));
+ ret = tc9563_pwrctrl_i2c_write(ctx->client, TC9563_PORT_SELECT,
+ BIT(port));
if (ret)
return ret;
- return tc9563_pwrctrl_i2c_bulk_write(ctx->client, nfts_seq, ARRAY_SIZE(nfts_seq));
+ return tc9563_pwrctrl_i2c_bulk_write(ctx->client, nfts_seq,
+ ARRAY_SIZE(nfts_seq));
}
-static int tc9563_pwrctrl_assert_deassert_reset(struct tc9563_pwrctrl_ctx *ctx, bool deassert)
+static int tc9563_pwrctrl_assert_deassert_reset(struct tc9563_pwrctrl_ctx *ctx,
+ bool deassert)
{
int ret, val;
- ret = tc9563_pwrctrl_i2c_write(ctx->client, TC9563_GPIO_CONFIG, TC9563_GPIO_MASK);
+ ret = tc9563_pwrctrl_i2c_write(ctx->client, TC9563_GPIO_CONFIG,
+ TC9563_GPIO_MASK);
if (ret)
return ret;
@@ -401,7 +416,8 @@ static int tc9563_pwrctrl_assert_deassert_reset(struct tc9563_pwrctrl_ctx *ctx,
return tc9563_pwrctrl_i2c_write(ctx->client, TC9563_RESET_GPIO, val);
}
-static int tc9563_pwrctrl_parse_device_dt(struct tc9563_pwrctrl_ctx *ctx, struct device_node *node,
+static int tc9563_pwrctrl_parse_device_dt(struct tc9563_pwrctrl_ctx *ctx,
+ struct device_node *node,
enum tc9563_pwrctrl_ports port)
{
struct tc9563_pwrctrl_cfg *cfg = &ctx->cfg[port];
@@ -540,7 +556,8 @@ static int tc9563_pwrctrl_probe(struct platform_device *pdev)
for (int i = 0; i < ARRAY_SIZE(tc9563_supply_names); i++)
ctx->supplies[i].supply = tc9563_supply_names[i];
- ret = devm_regulator_bulk_get(dev, TC9563_PWRCTL_MAX_SUPPLY, ctx->supplies);
+ ret = devm_regulator_bulk_get(dev, TC9563_PWRCTL_MAX_SUPPLY,
+ ctx->supplies);
if (ret) {
dev_err_probe(dev, ret, "failed to get supply regulator\n");
goto remove_i2c;
@@ -563,7 +580,8 @@ static int tc9563_pwrctrl_probe(struct platform_device *pdev)
/*
* Downstream ports are always children of the upstream port.
- * The first node represents DSP1, the second node represents DSP2, and so on.
+ * The first node represents DSP1, the second node represents DSP2,
+ * and so on.
*/
for_each_child_of_node_scoped(pdev->dev.of_node, child) {
port++;
@@ -574,7 +592,8 @@ static int tc9563_pwrctrl_probe(struct platform_device *pdev)
if (port == TC9563_DSP3) {
for_each_child_of_node_scoped(child, child1) {
port++;
- ret = tc9563_pwrctrl_parse_device_dt(ctx, child1, port);
+ ret = tc9563_pwrctrl_parse_device_dt(ctx,
+ child1, port);
if (ret)
break;
}
--
2.48.1
next prev parent reply other threads:[~2026-01-15 7:29 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-15 7:28 [PATCH v5 00/15] PCI/pwrctrl: Major rework to integrate pwrctrl devices with controller drivers Manivannan Sadhasivam via B4 Relay
2026-01-15 7:28 ` [PATCH v5 01/15] PCI/pwrctrl: pwrseq: Rename private struct and pointers for consistency Manivannan Sadhasivam via B4 Relay
2026-01-15 14:23 ` Bartosz Golaszewski
2026-01-15 7:28 ` [PATCH v5 02/15] PCI/pwrctrl: slot: " Manivannan Sadhasivam via B4 Relay
2026-01-15 14:24 ` Bartosz Golaszewski
2026-01-15 7:28 ` [PATCH v5 03/15] PCI/pwrctrl: tc9563: Use put_device() instead of i2c_put_adapter() Manivannan Sadhasivam via B4 Relay
2026-01-15 7:28 ` Manivannan Sadhasivam via B4 Relay [this message]
2026-01-15 14:24 ` [PATCH v5 04/15] PCI/pwrctrl: tc9563: Clean up whitespace Bartosz Golaszewski
2026-01-15 7:28 ` [PATCH v5 05/15] PCI/pwrctrl: tc9563: Add local variables to reduce repetition Manivannan Sadhasivam via B4 Relay
2026-01-15 14:25 ` Bartosz Golaszewski
2026-01-15 7:28 ` [PATCH v5 06/15] PCI/pwrctrl: tc9563: Rename private struct and pointers for consistency Manivannan Sadhasivam via B4 Relay
2026-01-15 14:26 ` Bartosz Golaszewski
2026-01-15 7:28 ` [PATCH v5 07/15] PCI/pwrctrl: slot: Factor out power on/off code to helpers Manivannan Sadhasivam via B4 Relay
2026-01-15 14:27 ` Bartosz Golaszewski
2026-01-15 7:29 ` [PATCH v5 08/15] PCI/pwrctrl: pwrseq: " Manivannan Sadhasivam via B4 Relay
2026-01-15 14:27 ` Bartosz Golaszewski
2026-01-15 7:29 ` [PATCH v5 09/15] PCI/pwrctrl: Add 'struct pci_pwrctrl::power_{on/off}' callbacks Manivannan Sadhasivam via B4 Relay
2026-01-15 7:29 ` [PATCH v5 10/15] PCI/pwrctrl: Add APIs to create, destroy pwrctrl devices Manivannan Sadhasivam via B4 Relay
2026-01-15 7:29 ` [PATCH v5 11/15] PCI/pwrctrl: Add APIs to power on/off " Manivannan Sadhasivam via B4 Relay
2026-01-15 7:29 ` [PATCH v5 12/15] PCI/pwrctrl: Switch to pwrctrl create, power on/off, destroy APIs Manivannan Sadhasivam via B4 Relay
2026-01-15 7:29 ` [PATCH v5 13/15] PCI: qcom: Drop the assert_perst() callbacks Manivannan Sadhasivam via B4 Relay
2026-01-15 14:29 ` Bartosz Golaszewski
2026-01-15 7:29 ` [PATCH v5 14/15] PCI: Drop the assert_perst() callback Manivannan Sadhasivam via B4 Relay
2026-01-15 7:29 ` [PATCH v5 15/15] PCI: qcom: Rename PERST# assert/deassert helpers for uniformity Manivannan Sadhasivam via B4 Relay
2026-01-16 19:29 ` [PATCH v5 00/15] PCI/pwrctrl: Major rework to integrate pwrctrl devices with controller drivers Bjorn Helgaas
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