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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47ee2814587sm40841935e9.10.2026.01.15.03.19.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jan 2026 03:19:48 -0800 (PST) Date: Thu, 15 Jan 2026 11:19:47 +0000 From: David Laight To: Paul Walmsley Cc: Feng Jiang , palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, samuel.holland@sifive.com, charlie@rivosinc.com, conor.dooley@microchip.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] riscv: lib: optimize strlen loop efficiency Message-ID: <20260115111947.54929ed0@pumpkin> In-Reply-To: References: <20251218032614.57356-1-jiangfeng@kylinos.cn> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Wed, 14 Jan 2026 19:03:17 -0700 (MST) Paul Walmsley wrote: > On Thu, 18 Dec 2025, Feng Jiang wrote: > > > Optimize the generic strlen implementation by using a pre-decrement > > pointer. This reduces the loop body from 4 instructions to 3 and > > eliminates the unconditional jump ('j'). > > > > Old loop (4 instructions, 2 branches): > > 1: lbu t0, 0(t1); beqz t0, 2f; addi t1, t1, 1; j 1b > > > > New loop (3 instructions, 1 branch): > > 1: addi t1, t1, 1; lbu t0, 0(t1); bnez t0, 1b Is that a change to the generic C code? Testing (++sc)[-1] might do the trick without requiring the extra read of the first location. > > > > This change improves execution efficiency and reduces branch pressure > > for systems without the Zbb extension. > > Looks reasonable; do you have any benchmarks on hardware that you can > share? Any reason why this patch stands alone and isn't rolled up as part > of your "optimize string function" series? For 64bit you can do a lot better (in C) by loading 64bit words and doing the correct 'shift and mask' sequence to detect a zero byte. It usually isn't worth in for 32bit. Does need to handle a mis-aligned base - eg by masking the bits off the base pointer and or'ing in non-zero values to the value read from the base pointer. David