From: Dhruva Gole <d-gole@ti.com>
To: "Rafael J. Wysocki" <rafael@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Kendall Willis <k-willis@ti.com>,
Sebin Francis <sebin.francis@ti.com>, Bryan Brattlof <bb@ti.com>,
<linux-pm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, Dhruva Gole <d-gole@ti.com>
Subject: [PATCH v2 2/3] cpufreq: ti-cpufreq: add support for AM62L3 SoC
Date: Fri, 16 Jan 2026 15:51:30 +0530 [thread overview]
Message-ID: <20260116-am62l-cpufreq-v2-2-eac7e2e78d29@ti.com> (raw)
In-Reply-To: <20260116-am62l-cpufreq-v2-0-eac7e2e78d29@ti.com>
Add CPUFreq support for the AM62L3 SoC with the appropriate
AM62L3 speed grade constants according to the datasheet [1].
This follows the same architecture-specific implementation pattern
as other TI SoCs in the AM6x family.
While at it, also sort instances where the SOC family names
were not sorted alphabetically.
[1] https://www.ti.com/lit/pdf/SPRSPA1
Signed-off-by: Dhruva Gole <d-gole@ti.com>
---
drivers/cpufreq/ti-cpufreq.c | 34 +++++++++++++++++++++++++++++++++-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index 6ee76f5fe9c567b0b88797ddb51764a2a5606b16..4e65e96b784ee908716c63316bb54eb1ac1efc49 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -48,6 +48,12 @@
#define AM625_SUPPORT_S_MPU_OPP BIT(1)
#define AM625_SUPPORT_T_MPU_OPP BIT(2)
+#define AM62L3_EFUSE_E_MPU_OPP 5
+#define AM62L3_EFUSE_O_MPU_OPP 15
+
+#define AM62L3_SUPPORT_E_MPU_OPP BIT(0)
+#define AM62L3_SUPPORT_O_MPU_OPP BIT(1)
+
enum {
AM62A7_EFUSE_M_MPU_OPP = 13,
AM62A7_EFUSE_N_MPU_OPP,
@@ -213,6 +219,22 @@ static unsigned long am625_efuse_xlate(struct ti_cpufreq_data *opp_data,
return calculated_efuse;
}
+static unsigned long am62l3_efuse_xlate(struct ti_cpufreq_data *opp_data,
+ unsigned long efuse)
+{
+ unsigned long calculated_efuse = AM62L3_SUPPORT_E_MPU_OPP;
+
+ switch (efuse) {
+ case AM62L3_EFUSE_O_MPU_OPP:
+ calculated_efuse |= AM62L3_SUPPORT_O_MPU_OPP;
+ fallthrough;
+ case AM62L3_EFUSE_E_MPU_OPP:
+ calculated_efuse |= AM62L3_SUPPORT_E_MPU_OPP;
+ }
+
+ return calculated_efuse;
+}
+
static struct ti_cpufreq_soc_data am3x_soc_data = {
.efuse_xlate = amx3_efuse_xlate,
.efuse_fallback = AM33XX_800M_ARM_MPU_MAX_FREQ,
@@ -313,8 +335,9 @@ static struct ti_cpufreq_soc_data am3517_soc_data = {
static const struct soc_device_attribute k3_cpufreq_soc[] = {
{ .family = "AM62X", },
{ .family = "AM62AX", },
- { .family = "AM62PX", },
{ .family = "AM62DX", },
+ { .family = "AM62LX", },
+ { .family = "AM62PX", },
{ /* sentinel */ }
};
@@ -327,6 +350,14 @@ static struct ti_cpufreq_soc_data am625_soc_data = {
.quirks = TI_QUIRK_SYSCON_IS_SINGLE_REG,
};
+static struct ti_cpufreq_soc_data am62l3_soc_data = {
+ .efuse_xlate = am62l3_efuse_xlate,
+ .efuse_offset = 0x0,
+ .efuse_mask = 0x07c0,
+ .efuse_shift = 0x6,
+ .multi_regulator = false,
+};
+
static struct ti_cpufreq_soc_data am62a7_soc_data = {
.efuse_xlate = am62a7_efuse_xlate,
.efuse_offset = 0x0,
@@ -463,6 +494,7 @@ static const struct of_device_id ti_cpufreq_of_match[] __maybe_unused = {
{ .compatible = "ti,am625", .data = &am625_soc_data, },
{ .compatible = "ti,am62a7", .data = &am62a7_soc_data, },
{ .compatible = "ti,am62d2", .data = &am62a7_soc_data, },
+ { .compatible = "ti,am62l3", .data = &am62l3_soc_data, },
{ .compatible = "ti,am62p5", .data = &am62p5_soc_data, },
/* legacy */
{ .compatible = "ti,omap3430", .data = &omap34xx_soc_data, },
--
2.34.1
next prev parent reply other threads:[~2026-01-16 10:22 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-16 10:21 [PATCH v2 0/3] cpufreq: ti: Add " Dhruva Gole
2026-01-16 10:21 ` [PATCH v2 1/3] cpufreq: dt-platdev: Add ti,am62l3 to blocklist Dhruva Gole
2026-01-16 21:16 ` Kendall Willis
2026-01-20 10:59 ` Dhruva Gole
2026-01-16 10:21 ` Dhruva Gole [this message]
2026-01-16 21:15 ` [PATCH v2 2/3] cpufreq: ti-cpufreq: add support for AM62L3 SoC Kendall Willis
2026-01-20 11:00 ` Dhruva Gole
2026-01-16 10:21 ` [PATCH v2 3/3] arm64: dts: ti: k3-am62l: support cpufreq Dhruva Gole
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