[PATCH] riscv: mm: Fixup no5lvl fails on physical address base = 128TiB

[guoren@kernel.org]

From: "Guo Ren (Alibaba DAMO Academy)" <guoren@kernel.org>

Unlike no4lvl, no5lvl still continues detect satp, which
requires va=pa mapping. When pa=0x800000000000, no5lvl
would fail in Sv48 mode due to an illegal VA value of
0x800000000000.

So, prevent detecting the satp flow for no5lvl, which is
the same as no4lvl. That means the user needs to know the
machine's exact mode when using no5lvl.

Fixes: 26e7aacb83df ("riscv: Allow to downgrade paging mode from the command line")
Cc: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: Björn Töpel <bjorn@rivosinc.com>
Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
---
 arch/riscv/mm/init.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index addb8a9305be..6b526f1e276a 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -872,6 +872,7 @@ static __init void set_satp_mode(uintptr_t dtb_pa)
 
 	if (satp_mode_limit == SATP_MODE_48) {
 		disable_pgtable_l5();
+		return;
 	} else if (satp_mode_limit == SATP_MODE_39) {
 		disable_pgtable_l5();
 		disable_pgtable_l4();
-- 
2.40.1