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[177.69.253.233]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2b6b3696f40sm11100722eec.35.2026.01.18.18.55.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Jan 2026 18:55:37 -0800 (PST) From: "Rafael V. Volkmer" To: ukleinek@kernel.org Cc: g-praveen@ti.com, j-keerthy@ti.com, linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, n-francis@ti.com, rafael.v.volkmer@gmail.com, u-kumar1@ti.com Subject: Re: [PATCH v2] pwm: tiehrpwm: Enable EHRPWM controller before setting configuration Date: Sun, 18 Jan 2026 23:55:04 -0300 Message-ID: <20260119025521.26212-1-rafael.v.volkmer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Hello Uwe, Gokul,=0D =0D Sorry for the late response, I was on vacation and away from my setup.=0D =0D On Fri, 9 Jan 2026 23:53:22 +0100, Uwe Kleine-K=C3=B6nig wrote:=0D > That makes me think the problem isn't understood well yet and needs more= =0D > research. @Rafael, does the problem reproduce for you with Gokul's=0D > recipe? (Or did you try that already? I understood your reply as "I=0D > didn't encounter the issue but also didn't test specifically for that.")= =0D =0D Right, my previous reply meant I hadn't explicitly targeted this issue yet.= =0D I have now re-tested using Gokul's sysfs configuration sequence, but I stil= l=0D cannot reproduce it on my setup.=0D =0D > As I cannot reproduce the issue, can you please check if adding=0D >=0D > pm_runtime_get_sync(pwmchip_parent(chip));=0D >=0D > to the probe function makes the problem disappear? Also please boot with= =0D >=0D > trace_event=3Dpwm=0D >=0D > on the command line and provide the content of=0D > /sys/kernel/debug/tracing/trace after reproducing the problem.=0D =0D Since I cannot reproduce the issue here, I can't validate whether adding=0D pm_runtime_get_sync() changes the behavior, and I don't have a failing=0D trace to share.=0D =0D For reference, I ran the tests on an AM62P EVM using TI's default SDK=0D userspace, with a custom kernel on top, and U-Boot from the SDK. The=0D board was booted from SD card.=0D =0D I used pwm1 instead of pwm0, since the PWM pin routed to the EVM 40-pin=0D header is ball B21 (SPI0_CLK / EHRPWM1_A). The signal was verified with a=0D logic analyzer at 24 MHz sampling rate.=0D =0D This makes me suspect the behavior Gokul observed might depend on another=0D configuration interacting in parallel.=0D =0D If possible, could Gokul try the same recipe on an AM62 EVM using TI's=0D default images and confirm whether the issue reproduces there? That is the= =0D platform I am currently working with. This should either match the AM62P=0D results or help identify a relevant configuration difference.=0D =0D Best regards,=0D Rafael V. Volkmer=0D