drivers/gpu/drm/mediatek/mtk_hdmi_v2.c:749:2-3: Unneeded semicolon

[kernel test robot <lkp@intel.com>]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   24d479d26b25bce5faea3ddd9fa8f3a6c3129ea7
commit: 8d0f798862731c62b09e7138a9032964d70566c2 drm/mediatek: Introduce HDMI/DDC v2 for MT8195/MT8188
date:   9 weeks ago
config: arm64-randconfig-r052-20260119 (https://download.01.org/0day-ci/archive/20260120/202601200114.YImDis3Z-lkp@intel.com/config)
compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 9b8addffa70cee5b2acc5454712d9cf78ce45710)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601200114.YImDis3Z-lkp@intel.com/

cocci warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/mediatek/mtk_hdmi_v2.c:749:2-3: Unneeded semicolon
   drivers/gpu/drm/mediatek/mtk_hdmi_v2.c:1160:2-3: Unneeded semicolon
   drivers/gpu/drm/mediatek/mtk_hdmi_v2.c:1188:2-3: Unneeded semicolon

vim +749 drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

   680	
   681	static void mtk_hdmi_v2_change_video_resolution(struct mtk_hdmi *hdmi,
   682							struct drm_connector_state *conn_state)
   683	{
   684		mtk_hdmi_v2_hw_reset(hdmi);
   685		mtk_hdmi_v2_set_sw_hpd(hdmi, true);
   686		udelay(2);
   687	
   688		regmap_write(hdmi->regs, HDCP_TOP_CTRL, 0);
   689	
   690		/*
   691		 * Enable HDCP reauthentication interrupt: the HW uses this internally
   692		 * for the HPD state machine even if HDCP encryption is not enabled.
   693		 */
   694		regmap_set_bits(hdmi->regs, TOP_INT_ENABLE00, HDCP2X_RX_REAUTH_REQ_DDCM_INT);
   695	
   696		/* Enable hotplug and pord interrupts */
   697		mtk_hdmi_v2_enable_hpd_pord_irq(hdmi, true);
   698	
   699		/* Force enabling HDCP HPD */
   700		regmap_set_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_OVR);
   701		regmap_set_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_SW);
   702	
   703		/* Set 8 bits per pixel */
   704		regmap_update_bits(hdmi->regs, TOP_CFG00, TMDS_PACK_MODE,
   705				   FIELD_PREP(TMDS_PACK_MODE, TMDS_PACK_MODE_8BPP));
   706		/* Disable generating deepcolor packets */
   707		regmap_clear_bits(hdmi->regs, TOP_CFG00, DEEPCOLOR_PKT_EN);
   708		/* Disable adding deepcolor information to the general packet */
   709		regmap_clear_bits(hdmi->regs, TOP_MISC_CTLR, DEEP_COLOR_ADD);
   710	
   711		if (hdmi->curr_conn->display_info.is_hdmi)
   712			regmap_set_bits(hdmi->regs, TOP_CFG00, HDMI_MODE_HDMI);
   713		else
   714			regmap_clear_bits(hdmi->regs, TOP_CFG00, HDMI_MODE_HDMI);
   715	
   716		udelay(5);
   717		mtk_hdmi_v2_hw_vid_mute(hdmi, true);
   718		mtk_hdmi_v2_hw_aud_mute(hdmi, true);
   719		mtk_hdmi_v2_hw_gcp_avmute(hdmi, false);
   720	
   721		regmap_update_bits(hdmi->regs, TOP_CFG01,
   722				   NULL_PKT_VSYNC_HIGH_EN | NULL_PKT_EN, NULL_PKT_VSYNC_HIGH_EN);
   723		usleep_range(100, 150);
   724	
   725		/* Enable scrambling if tmds clock is 340MHz or more */
   726		mtk_hdmi_v2_enable_scrambling(hdmi, hdmi->mode.clock >= 340 * KILO);
   727	
   728		switch (conn_state->hdmi.output_format) {
   729		default:
   730		case HDMI_COLORSPACE_RGB:
   731		case HDMI_COLORSPACE_YUV444:
   732			/* Disable YUV420 downsampling for RGB and YUV444 */
   733			mtk_hdmi_yuv420_downsampling(hdmi, false);
   734			break;
   735		case HDMI_COLORSPACE_YUV422:
   736			/*
   737			 * YUV420 downsampling is special and needs a bit of setup
   738			 * so we disable everything there before doing anything else.
   739			 *
   740			 * YUV422 downsampling instead just needs one bit to be set.
   741			 */
   742			mtk_hdmi_yuv420_downsampling(hdmi, false);
   743			regmap_set_bits(hdmi->regs, VID_DOWNSAMPLE_CONFIG,
   744					C444_C422_CONFIG_ENABLE);
   745			break;
   746		case HDMI_COLORSPACE_YUV420:
   747			mtk_hdmi_yuv420_downsampling(hdmi, true);
   748			break;
 > 749		};
   750	}
   751	

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