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[142.162.112.119]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8946e3aee12sm1805076d6.39.2026.01.20.05.26.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Jan 2026 05:26:58 -0800 (PST) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1viBl3-00000005WB9-3bIR; Tue, 20 Jan 2026 09:26:57 -0400 Date: Tue, 20 Jan 2026 09:26:57 -0400 From: Jason Gunthorpe To: "Aneesh Kumar K.V (Arm)" Cc: linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-coco@lists.linux.dev, Catalin Marinas , will@kernel.org, robin.murphy@arm.com, suzuki.poulose@arm.com, steven.price@arm.com, Marek Szyprowski Subject: Re: [PATCH 1/2] dma-direct: Validate DMA mask against canonical DMA addresses Message-ID: <20260120132657.GO961572@ziepe.ca> References: <20260120064255.179425-1-aneesh.kumar@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260120064255.179425-1-aneesh.kumar@kernel.org> On Tue, Jan 20, 2026 at 12:12:54PM +0530, Aneesh Kumar K.V (Arm) wrote: > On systems that apply an address encryption tag or mask to DMA addresses, > DMA mask validation must be performed against the canonical DMA address. > Using a non-canonical (e.g. encrypted or unencrypted) DMA address > can incorrectly fail capability checks, since architecture-specific > encryption bits are not part of the device’s actual DMA addressing > capability. For example, arm64 adds PROT_NS_SHARED to unencrypted DMA > addresses. Huh? static inline dma_addr_t phys_to_dma_direct(struct device *dev, phys_addr_t phys) { if (force_dma_unencrypted(dev)) return phys_to_dma_unencrypted(dev, phys); return phys_to_dma(dev, phys); } dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size, enum dma_data_direction dir, unsigned long attrs) { [..] /* Ensure that the address returned is DMA'ble */ dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr); [..] return dma_addr; } The check in dma_direct_supported() is checking if the device's HW capability can contain the range of dma_addr_t's the DMA API will generate. Since it above is generating dma_addr_t's with the PROT_NS_SHARED set, it is correct to check it against the mask. If the IOVA does not contain PROT_NS_SHARED then I would expect all of the above to be removed too? Can you please explain what the probem is better? I just had a long talk with our internal people about this very subject and they were adament that the ARM design had the T=0 SMMU S2 configured so that the IOVA starts at PROT_NS_SHARED, not 0. I am against this, I think it is a bad choice, and this patch is showing exactly why :) IMHO you should map the T=0 S2 so that the IOVA starts at 0 and we don't add PROT_NS_SHARED to the IOVA anyhwere. This logic is going to be wrong for T=1 DMA to private memory though. Jason