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Peter Anvin" , Peter Zijlstra , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , James Clark , Shuah Khan , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Jim Mattson Content-Type: text/plain; charset="UTF-8" This series adds support for AMD's Host-Only (bit 41) and Guest-Only (bit 40) performance counter eventsel bits in KVM's mediated PMU passthrough implementation. These bits allow an nSVM-enabled guest to configure performance counters that count only during L1 execution (Host-Only) or only during L2 execution (Guest-Only). KVM tracks which PMCs have Host-Only xor Guest-Only bits set, and updates the hardware event selector ENABLE bit at the following state transitions: - EFER.SVME changes: Enable/disable Guest-Only counters - VMRUN: Disable Host-Only, enable Guest-Only counters - VMEXIT: Enable Host-Only, disable Guest-Only counters Jim Mattson (6): KVM: x86/pmu: Introduce amd_pmu_set_eventsel_hw() KVM: x86/pmu: Disable HG_ONLY events as appropriate for current vCPU state KVM: x86/pmu: Track enabled AMD PMCs with Host-Only xor Guest-Only bits set KVM: x86/pmu: [De]activate HG_ONLY PMCs at SVME changes and nested transitions KVM: x86/pmu: Allow HG_ONLY bits with nSVM and mediated PMU KVM: selftests: x86: Add svm_pmu_hg_test for HG_ONLY bits arch/x86/include/asm/kvm-x86-pmu-ops.h | 1 + arch/x86/include/asm/kvm_host.h | 4 + arch/x86/include/asm/perf_event.h | 2 + arch/x86/kvm/pmu.c | 9 + arch/x86/kvm/pmu.h | 4 + arch/x86/kvm/svm/nested.c | 10 + arch/x86/kvm/svm/pmu.c | 84 ++++- arch/x86/kvm/svm/svm.c | 3 + tools/testing/selftests/kvm/Makefile.kvm | 1 + .../selftests/kvm/x86/svm_pmu_hg_test.c | 297 ++++++++++++++++++ 10 files changed, 412 insertions(+), 3 deletions(-) create mode 100644 tools/testing/selftests/kvm/x86/svm_pmu_hg_test.c -- 2.52.0.457.g6b5491de43-goog