From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8EC5335BA for ; Sat, 24 Jan 2026 00:52:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769215931; cv=none; b=Ft30drkAleSp3x24qmQzX3YXhPkHn4CITQFgKlD2unCBYqyA2t6f9I+wekPsEQXkU/YKDcIWzMPJ9z8zGJ2t9imX29poKHtxgxTQWUIEySE6L9TpIjfVKggWdj6oPl8AD8blA7nC7apfIogVDJ2nr9Fk4pqc7CI5ksHXhavATKw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769215931; c=relaxed/simple; bh=mbG+HfQHTOBEjr/iG4I9qoDyiQzFH9/65SOP9bR+ZW4=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=cKRxeS++Wq2ptn8v/WaPKdWayJj8pDDTvUsQIZ15Y/AL12je0IFiEk0euGOrg2T2cEh6eef5VpVp5j5nfpRqaDtFDmINpr9w5Rjb8cWQ2gaX6SyqIkHe+sLjCHfUwpDRTVLRTsxxWT3Z3aXJSIfFYBwgxOUCQ/qOnUIDjw9E4LE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=cYgWLu04; arc=none smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="cYgWLu04" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1769215930; x=1800751930; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=mbG+HfQHTOBEjr/iG4I9qoDyiQzFH9/65SOP9bR+ZW4=; b=cYgWLu04aZVgAdMabcR7Q8QZVzy3o59q0MeRFUcFCOKp4/chuoT0Z6N0 QU6oOShwvYEYyXnpHbp+UfEfK8pFFlIeWn/Bw+bdFX+DkBnr2KNu+00fM aDm/3so5/D9qODwAgs+Uy2MsPtv/db7lR+vKcRm/k46YLBOxn24dpTYq2 +RA0fO2jEpnDR3iwJotC5KOfmpqvXQPpUd2mFlrr6NuNAJc2KFgsal9AO SgqP/5z/5v4KwfwSINejz2QgHCHh8CEuRAN8eq3Rfq549UknsSRPkULwS oHXbrqjV22wPA/+k2K6uRbVcBXQ7xw6j07hJfNg6S4L3uloXqnokRo04R w==; X-CSE-ConnectionGUID: dW+NPUYmShS9ZOK20k17tA== X-CSE-MsgGUID: P9oVyDdnTZy6khUYHrX0sg== X-IronPort-AV: E=McAfee;i="6800,10657,11680"; a="74318203" X-IronPort-AV: E=Sophos;i="6.21,249,1763452800"; d="scan'208";a="74318203" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2026 16:52:09 -0800 X-CSE-ConnectionGUID: 7y0FyRt3QyWCg3HPnGPf1w== X-CSE-MsgGUID: 2eserH41TVW5xGCU6x3M7w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,249,1763452800"; d="scan'208";a="238420193" Received: from black.igk.intel.com ([10.91.253.5]) by fmviesa001.fm.intel.com with ESMTP; 23 Jan 2026 16:52:07 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id 659FB95; Sat, 24 Jan 2026 01:52:06 +0100 (CET) From: Andy Shevchenko To: Andy Shevchenko , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Subject: [PATCH v1 1/1] mtd: cfi_cmdset_0001: Factor out do_write_buffer_locked() to reduce stack frame Date: Sat, 24 Jan 2026 01:52:03 +0100 Message-ID: <20260124005203.3167280-1-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Compiler is not happy about used stack frame: drivers/mtd/chips/cfi_cmdset_0001.c: In function 'do_write_buffer': drivers/mtd/chips/cfi_cmdset_0001.c:1887:1: error: the frame size of 1296 bytes is larger than 1280 bytes [-Werror=frame-larger-than=] Fix this by factoring out do_write_buffer_locked(). Signed-off-by: Andy Shevchenko --- drivers/mtd/chips/cfi_cmdset_0001.c | 77 +++++++++++++++++------------ 1 file changed, 45 insertions(+), 32 deletions(-) diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c index c10693ba265b..8e497e0268f7 100644 --- a/drivers/mtd/chips/cfi_cmdset_0001.c +++ b/drivers/mtd/chips/cfi_cmdset_0001.c @@ -1720,40 +1720,24 @@ static int cfi_intelext_write_words (struct mtd_info *mtd, loff_t to , size_t le } -static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, - unsigned long adr, const struct kvec **pvec, - unsigned long *pvec_seek, int len) +static int __xipram do_write_buffer_locked(struct map_info *map, struct flchip *chip, + unsigned long cmd_adr, unsigned long adr, + const struct kvec **pvec, + unsigned long *pvec_seek, int len) { struct cfi_private *cfi = map->fldrv_priv; map_word status, write_cmd, datum; - unsigned long cmd_adr; - int ret, wbufsize, word_gap, words; + int ret, word_gap, words; const struct kvec *vec; unsigned long vec_seek; unsigned long initial_adr; int initial_len = len; - wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize; - adr += chip->start; initial_adr = adr; - cmd_adr = adr & ~(wbufsize-1); - - /* Sharp LH28F640BF chips need the first address for the - * Page Buffer Program command. See Table 5 of - * LH28F320BF, LH28F640BF, LH28F128BF Series (Appendix FUM00701) */ - if (is_LH28F640BF(cfi)) - cmd_adr = adr; /* Let's determine this according to the interleave only once */ write_cmd = (cfi->cfiq->P_ID != P_ID_INTEL_PERFORMANCE) ? CMD(0xe8) : CMD(0xe9); - mutex_lock(&chip->mutex); - ret = get_chip(map, chip, cmd_adr, FL_WRITING); - if (ret) { - mutex_unlock(&chip->mutex); - return ret; - } - XIP_INVAL_CACHED_RANGE(map, initial_adr, initial_len); ENABLE_VPP(map); xip_disable(map, chip, cmd_adr); @@ -1789,7 +1773,7 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, xip_enable(map, chip, cmd_adr); printk(KERN_ERR "%s: Chip not ready for buffer write. Xstatus = %lx, status = %lx\n", map->name, Xstatus.x[0], status.x[0]); - goto out; + return ret; } /* Figure out the number of words to write */ @@ -1853,7 +1837,7 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, chip->state = FL_STATUS; xip_enable(map, chip, cmd_adr); printk(KERN_ERR "%s: buffer write error (status timeout)\n", map->name); - goto out; + return ret; } /* check for errors */ @@ -1866,21 +1850,50 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, map_write(map, CMD(0x70), cmd_adr); xip_enable(map, chip, cmd_adr); - if (chipstatus & 0x02) { - ret = -EROFS; - } else if (chipstatus & 0x08) { + if (chipstatus & 0x02) + return -EROFS; + + if (chipstatus & 0x08) { printk(KERN_ERR "%s: buffer write error (bad VPP)\n", map->name); - ret = -EIO; - } else { - printk(KERN_ERR "%s: buffer write error (status 0x%lx)\n", map->name, chipstatus); - ret = -EINVAL; + return -EIO; } - goto out; + printk(KERN_ERR "%s: buffer write error (status 0x%lx)\n", map->name, chipstatus); + return -EINVAL; } xip_enable(map, chip, cmd_adr); - out: DISABLE_VPP(map); + return 0; +} + +static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, + unsigned long adr, const struct kvec **pvec, + unsigned long *pvec_seek, int len) +{ + struct cfi_private *cfi = map->fldrv_priv; + unsigned long cmd_adr; + int ret, wbufsize; + + wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize; + adr += chip->start; + cmd_adr = adr & ~(wbufsize - 1); + + /* Sharp LH28F640BF chips need the first address for the + * Page Buffer Program command. See Table 5 of + * LH28F320BF, LH28F640BF, LH28F128BF Series (Appendix FUM00701) */ + if (is_LH28F640BF(cfi)) + cmd_adr = adr; + + mutex_lock(&chip->mutex); + ret = get_chip(map, chip, cmd_adr, FL_WRITING); + if (ret) { + mutex_unlock(&chip->mutex); + return ret; + } + + ret = do_write_buffer_locked(map, chip, cmd_adr, adr, pvec, pvec_seek, len); + + DISABLE_VPP(map); put_chip(map, chip, cmd_adr); mutex_unlock(&chip->mutex); return ret; -- 2.50.1