From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C0802F744C for ; Mon, 26 Jan 2026 08:01:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769414494; cv=none; b=c64X1lSaPBVsmDziB3FMDGzOYKqm+iV9CCwQEREx+EbJugzb2bATf7xnxglyNqjUBjP4UXuuhDmm6mTiLiKCzcBOPbHmcaKLi67PUt4IGvSwCn6alQCej/wHZlZT+PiI/3oZDuKKVpkKQSVHpGfiOsrBcV5DdHAicdQPCPPW88M= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769414494; c=relaxed/simple; bh=f59A5o1vN4CEQvytvjCpiycHWQSjuFK8Xl9F5GvJqTc=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=kRAhdb9ZbxQQW6DjOOjpTDaP9qaW1P0K7nHSEK2fJJpwEHPDXaQg03n40ndU59sXOM314IdAiKK1JBTJrlKp3u+UG/diIbysCYoS7dGCdyHDQpRUgGn6tzr4HQ/nHMSB1sxNEXqQ2nndjJ9n/BAYpcmoB1eA+01sC1CMYPlk9kI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=oNVZtrop; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=uB/+/pPz; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="oNVZtrop"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="uB/+/pPz" Date: Mon, 26 Jan 2026 09:01:19 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1769414480; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=ixmO5ckIsijXR3o9Y9Ub8ZmZFsHwqWkNhY66q18gfQM=; b=oNVZtropLx8xIn30Hhd50l7kIZMTJgkL7lJ7lNcJtzFDrQZWx8+NPsq6Y2CVDFKt3MQ2xf nDwnUhz58hWV5Whdg7ZRFyg9+WTrDB75iiv5c4AkOnB6TER0G6NXBq+IZy2s0+tKWIY5+Y SSv+zwoWvf4AL0vqI1JAyMizaseJKfi7rz08wJ0WcsnpojBQy9twnvM74CcTP19xjSc+1c +y4JvqDoLlFkXbTLE4rmBAgVT9VIev+f7BL8smYG+HktXIxAyj9TeQb4/mRs3s/CaAgV53 YA7jNSigBVJ80oiV8LETccy+47MNH3l36RcYGAQdfnpFyV3s6KL8laZvrBX9RA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1769414480; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=ixmO5ckIsijXR3o9Y9Ub8ZmZFsHwqWkNhY66q18gfQM=; b=uB/+/pPzce51d7yNhjgs5Q7QKRaM6W2S/x18fHcy8FeG25xB6qA109aKCZw0T6k4QJOYqE PLHDAznD8FKu3/Cw== From: Sebastian Andrzej Siewior To: Andy Shevchenko Cc: linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, Thomas Gleixner , Lee Jones , patches@opensource.cirrus.com, Mark Brown Subject: Re: [PATCH 17/21] mfd: wm8350-core: Use IRQF_ONESHOT Message-ID: <20260126080119.AEjgGgaw@linutronix.de> References: <20260123113708.416727-1-bigeasy@linutronix.de> <20260123113708.416727-18-bigeasy@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: On 2026-01-23 16:52:59 [+0200], Andy Shevchenko wrote: > On Fri, Jan 23, 2026 at 12:37:03PM +0100, Sebastian Andrzej Siewior wrote: > > Using a threaded interrupt without a dedicated primary handler mandates > > the IRQF_ONESHOT flag to mask the interrupt source while the threaded > > handler is active. Otherwise the interrupt can fire again before the > > threaded handler had a chance to run. > > > > Mark explained that this should not happen with this hardware since it a > > "it is a" ? yes. > > slow irqchip which is behind an I2C/ SPI bus but the IRQ-core will > > refuse to accept such a handler. > > > > Set IRQF_ONESHOT so the interrupt source is masked until the secondary > > handler is done. > > ... > > > Cc: Lee Jones > > Cc: Andy Shevchenko > > Cc: patches@opensource.cirrus.com > > Cc: Mark Brown > > Cc list can be moved out from the commit message. If I move it out, the list won't be CCed. Sebastian