From: Michael Walle <mwalle@kernel.org>
To: Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Udit Kumar <u-kumar1@ti.com>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Michael Walle <mwalle@kernel.org>
Subject: [PATCH] arm64: dts: ti: k3-am67a-kontron-sa67-base: fix QSPI flash timing
Date: Tue, 27 Jan 2026 13:22:03 +0100 [thread overview]
Message-ID: <20260127122211.1064546-1-mwalle@kernel.org> (raw)
The boot flash is connected to the QSPI bus, but that bus is also
connected to the edge connector. To prevent a stuck bus during boot. The
signals to the edge connected are guarded by a FET switch. This FET
switch needs a setup time of at least 80ns to disconnect the
passthrough otherwise the first few clock cycles are still visible on
the edge connector. Fix it by increasing the CS-to-clock timing to
120ns.
Fixes: 1c3c4df06f9d ("arm64: dts: ti: Add support for Kontron SMARC-sAM67")
Signed-off-by: Michael Walle <mwalle@kernel.org>
---
arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts
index cdc9b5778041..9c0489514e04 100644
--- a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts
+++ b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts
@@ -957,7 +957,7 @@ flash@0 {
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
- cdns,tslch-ns = <60>;
+ cdns,tslch-ns = <120>;
cdns,read-delay = <3>;
vcc-supply = <&vcc_1p8_s0>;
bootph-all;
--
2.47.3
reply other threads:[~2026-01-27 12:22 UTC|newest]
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