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Wed, 28 Jan 2026 04:35:24 -0800 Date: Wed, 28 Jan 2026 14:35:22 +0200 From: Zhi Wang To: Alexandre Courbot CC: Danilo Krummrich , Alice Ryhl , Daniel Almeida , Miguel Ojeda , Boqun Feng , Gary Guo , =?UTF-8?B?QmrDtnJu?= Roy Baron , Benno Lossin , "Andreas Hindborg" , Trevor Gross , "Yury Norov" , John Hubbard , "Alistair Popple" , Joel Fernandes , "Timur Tabi" , Edwin Peer , Eliot Courtney , Dirk Behme , Steven Price , , Subject: Re: [PATCH v4 6/7] sample: rust: pci: use `register!` macro Message-ID: <20260128143522.434f75f6.zhiw@nvidia.com> In-Reply-To: <20260128-register-v4-6-aee3a33d9649@nvidia.com> References: <20260128-register-v4-0-aee3a33d9649@nvidia.com> <20260128-register-v4-6-aee3a33d9649@nvidia.com> Organization: NVIDIA X-Mailer: Claws Mail 4.3.1 (GTK 3.24.33; x86_64-pc-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001E9:EE_|SN7PR12MB7451:EE_ X-MS-Office365-Filtering-Correlation-Id: 0187a4b4-e3ac-4261-e47a-08de5e69c4b4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|82310400026|7416014|376014; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Jan 2026 12:35:49.6670 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0187a4b4-e3ac-4261-e47a-08de5e69c4b4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001E9.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7451 On Wed, 28 Jan 2026 11:37:32 +0900 Alexandre Courbot wrote: > Convert the direct IO accesses to properly defined registers. > Tested-by: Zhi Wang I can see the correct value of the registers read by the sample driver from the demesg. Additionally, Clippy was complaining about unnecssary unsafe blocks and can be fixed by: (I haven't fully gone through the code, just applied this for getting rid of the warnnings.) diff --git a/rust/kernel/num/bounded.rs b/rust/kernel/num/bounded.rs index 850827033f67..efabdd31ec37 100644 --- a/rust/kernel/num/bounded.rs +++ b/rust/kernel/num/bounded.rs @@ -503,9 +503,7 @@ pub fn cast(self) -> Bounded pub fn shr(self) -> Bounded { const { assert!(RES >= N - SHIFT) } - // SAFETY: We shift the value right by `SHIFT`, reducing the number of bits needed to - // represent the shifted value by as much, and just asserted that `RES == N - SHIFT`. - unsafe { Bounded::__new(self.0 >> SHIFT) } + Bounded::__new(self.0 >> SHIFT) } /// Left-shifts `self` by `SHIFT` and returns the result as a `Bounded<_, RES>`, where `RES >= @@ -524,9 +522,7 @@ pub fn shr(self) -> Bounded { pub fn shl(self) -> Bounded { const { assert!(RES >= N + SHIFT) } - // SAFETY: We shift the value left by `SHIFT`, augmenting the number of bits needed to - // represent the shifted value by as much, and just asserted that `RES == N + SHIFT`. - unsafe { Bounded::__new(self.0 << SHIFT) } + Bounded::__new(self.0 << SHIFT) } } Z. > Signed-off-by: Alexandre Courbot > --- > samples/rust/rust_driver_pci.rs | 23 ++++++++++++++++++----- > 1 file changed, 18 insertions(+), 5 deletions(-) > > diff --git a/samples/rust/rust_driver_pci.rs > b/samples/rust/rust_driver_pci.rs index 4dfb8a6a4707..df2232d6b71f 100644 > --- a/samples/rust/rust_driver_pci.rs > +++ b/samples/rust/rust_driver_pci.rs > @@ -70,24 +70,37 @@ fn testdev(index: &TestIndex, bar: &Bar0) -> > Result { fn config_space(pdev: &pci::Device) { > let config = pdev.config_space(); > > - // TODO: use the register!() macro for defining PCI > configuration space registers once it > - // has been move out of nova-core. > + // Some PCI configuration space registers. > + ::kernel::register! { > + VENDOR_ID(u16) @ 0x0 { > + 15:0 vendor_id; > + } > + > + REVISION_ID(u8) @ 0x8 { > + 7:0 revision_id; > + } > + > + BAR(u32)[6] @ 0x10 { > + 31:0 value; > + } > + } > + > dev_info!( > pdev.as_ref(), > "pci-testdev config space read8 rev ID: {:x}\n", > - config.read8(0x8) > + REVISION_ID::read(&&config).revision_id() > ); > > dev_info!( > pdev.as_ref(), > "pci-testdev config space read16 vendor ID: {:x}\n", > - config.read16(0) > + VENDOR_ID::read(&&config).vendor_id() > ); > > dev_info!( > pdev.as_ref(), > "pci-testdev config space read32 BAR 0: {:x}\n", > - config.read32(0x10) > + BAR::read(&&config, 0).value() > ); > } > } >