From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from canpmsgout03.his.huawei.com (canpmsgout03.his.huawei.com [113.46.200.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5DBFC3C1985 for ; Tue, 3 Feb 2026 16:18:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.218 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770135531; cv=none; b=pzPUZkgM4kwgFDno9u5rpvexI+sGKrMFR5jDCB/qC2puOpBq6FYytEmdn+vaRZkcqyO3hanwfP3zL95aM2RUZE1oFfrLltCZj+NrpWPczldO5pz1suyCDONFif+PJ+E63ecc4DquryMCKEIFSC6jpUU/a33cTdXyW7QA6PoyiA0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770135531; c=relaxed/simple; bh=RMQc+hyz9ksxfnokWgFh4xf05zIxI63QB/Zr4M8kelA=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=oRTgl4pdCN658RhLW6QPgfT5r7uYzL19DsH+czUqmBWygpKKdy4H8lpjgleCgvx1ztfvJSIhi/q4Ky4ldw5cicUgYvDSTqOKMFeo+LI/nOXI62OmxtopbC324uSNIin+9eWOczefiMinNfhuqpcHyYY2Vr22/iVS5w+aiWkA4HY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=ruTunpaG; arc=none smtp.client-ip=113.46.200.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="ruTunpaG" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=Gh6K8uzGpu07akesHYxtytk8Fu2WBHrOKhUBMvlkqGk=; b=ruTunpaG+rhFgL8aPS72iBwO3hSKpfYoai0IsJt3ZCouseaQnnjQA78uKffbLGNdgcEIXMu0e BDGGjIkAQNsp7z/Z1FqrxOwIGhpmorvN2+L0RyLWvK7FrmpNmQZdj0aDGGFAVgb69p+c+UQTTHv F5oEUU2oY0x3EeTrTahRO8E= Received: from mail.maildlp.com (unknown [172.19.162.144]) by canpmsgout03.his.huawei.com (SkyGuard) with ESMTPS id 4f57pz6xRkzpSvR; Wed, 4 Feb 2026 00:14:35 +0800 (CST) Received: from dggemv706-chm.china.huawei.com (unknown [10.3.19.33]) by mail.maildlp.com (Postfix) with ESMTPS id 5BEC940567; Wed, 4 Feb 2026 00:18:45 +0800 (CST) Received: from kwepemn100008.china.huawei.com (7.202.194.111) by dggemv706-chm.china.huawei.com (10.3.19.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 4 Feb 2026 00:18:45 +0800 Received: from localhost.huawei.com (10.90.31.46) by kwepemn100008.china.huawei.com (7.202.194.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.36; Wed, 4 Feb 2026 00:18:44 +0800 From: Yushan Wang To: , , , , , , , , CC: , , , , , , Subject: [PATCH 0/3] soc: Enable cache lockdown for HiSilicon L3 cache Date: Wed, 4 Feb 2026 00:18:40 +0800 Message-ID: <20260203161843.649417-1-wangyushan12@huawei.com> X-Mailer: git-send-email 2.33.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: kwepems200001.china.huawei.com (7.221.188.67) To kwepemn100008.china.huawei.com (7.202.194.111) Provide support for L3 cache lockdown on HiSilicon L3 caches. Cache lockdown means to make a memory region locked inside the L3 cache for better access latency. The data stored in L3 cache will behave like any other data (i.e. it still follows cache coherency protocol etc.) except it won't be evicted unless explicitly asked to by deallocation. This way a process may have an option to maintain QoS even with noisy neighbors sharing the same L3 cache. Ideally locked data will have stable low access latency despite high background stress. It is also useful for scenarios that have especially high cache miss penalty. However, while enhancing some processes, reserving cache resource will raise the performance problem to other processes running on the CPUs that share the L3 cache that carries locked data, users should be careful to do so. --- Changes since RFC v2: - Fixed compile errors for x86 building. - Link to v2: https://lore.kernel.org/all/20251217102357.1730573-1-wangyushan12@huawei.com/ Changes since RFC v1: - Fixed compile errors of types specified in uapi header files. - Changed ioctl numbers to avoid confliction. - Link to v1: https://lore.kernel.org/all/20251125080542.3721829-1-wangyushan12@huawei.com/ Yushan Wang (3): soc cache: L3 cache driver for HiSilicon SoC soc cache: L3 cache lockdown support for HiSilicon SoC Documentation: soc cache: Add documentation to HiSilicon SoC cache Documentation/driver-api/hisi-soc-cache.rst | 64 ++ Documentation/driver-api/index.rst | 1 + .../userspace-api/ioctl/ioctl-number.rst | 1 + MAINTAINERS | 7 + drivers/soc/hisilicon/Kconfig | 11 + drivers/soc/hisilicon/Makefile | 2 + drivers/soc/hisilicon/hisi_soc_l3c.c | 883 ++++++++++++++++++ include/uapi/misc/hisi_l3c.h | 28 + 8 files changed, 997 insertions(+) create mode 100644 Documentation/driver-api/hisi-soc-cache.rst create mode 100644 drivers/soc/hisilicon/hisi_soc_l3c.c create mode 100644 include/uapi/misc/hisi_l3c.h -- 2.33.0