From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ej1-f51.google.com (mail-ej1-f51.google.com [209.85.218.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A8E03242BC for ; Tue, 3 Feb 2026 18:56:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.51 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770144995; cv=none; b=IYM0sqOqt4CZCQLboi1ktgnbutEIFguZaINTCs37+cvlK4Gjyini7QKCKlTxCuqEGmMF5kHJ0QrwRvB9YMWdPcv0wRG+ig+d1oprUoC4zwUf2FjlMHn0a+jsDVp1tR3xRHcuTbSKbSU1A7U/dUst6fTvOcjSEJdO5AnacX/J9vg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770144995; c=relaxed/simple; bh=K4AnTH27PLzuCw+grx3N3blbP+yYBihQeuN/dXpSQ0Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=H53FGYCpJy2JWqiTxgKlQ9CU6TR/IVXnWeCTurn+G+YxFmAiO/ZoHQkOwFj1+/z32ZBrqqkTcztSvE1qFUp2ce4kO5GrmVMcoTrJlUwMi1nhH0n9UbvuG/lDI7uM2dTQ0DfkF6ABX9t1qtgE0vwcQ1X+IyheeqIYr6YztMai2rw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=mdfgr+Wa; arc=none smtp.client-ip=209.85.218.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="mdfgr+Wa" Received: by mail-ej1-f51.google.com with SMTP id a640c23a62f3a-b8e9f2d24c5so3368666b.3 for ; Tue, 03 Feb 2026 10:56:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770144992; x=1770749792; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=p2t7zmxZ0V/ra2TNj4y1ls2+nk6Mu20D0VPdmpFC7/A=; b=mdfgr+WaPFaBH0TS1fxgQaOL6pHIvKj07uP87shy8eUHtWntwNoEGjeNzCoCV9c9oD hIs/iKvpyq/35oKwBAkveIg/AfTDDl+YRRELSFeULrCSdLqVKrBu47VfoY8+d29tEnTW ordJYT+JF9ni7wdNCIlk6ooy4rhO+zCUx7o0xlR265iboLXJeRvL83yg7IXh4mJTppoQ lnIAzn7/ikzbP+m/i8TNbwCPJSY9NFpmTZXBfr68hi2T+WYU6dLepFFj9UPhcxw2rz1U BDvHcSgmtf75qG6hdhjzW1OBKRENkLk875v/ftsu4i4sIJVDWkSyCW/5Ksp5UV5tpeUJ DCzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770144992; x=1770749792; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=p2t7zmxZ0V/ra2TNj4y1ls2+nk6Mu20D0VPdmpFC7/A=; b=SuDlyVCpk9hYgZ3jWm4HHtkmdJWXHOANx/xqB/sgaGNLPcEMAegVN411zzl6Vj9Aem V8T0O/aDD+NEa8oYX8JL/7BfuYjovlewQQk2lH1syB6QCtXI+tfjW6MPHu5xmrRcFaQQ Su6Yyd4po0P1w5nhg85rA3MGtFNzBM5hC0gutKZHpTxK8ty3iQimdjTawZdBW1rf/ykb ZUmck09Cs7J1+cJJZcdTjhLURqUhe2b3CkYvzlczntiB+qXRjRl8aDeVfYXZsRZeWlVU 3oVO+laiSqRKk2A7xhZDV4iVE2U3DJQB54APEPGb10apPgyuXEyHjoF82UozCPxgZJSb dGvg== X-Forwarded-Encrypted: i=1; AJvYcCU01lD3dhwk3wICtHoMBYfFb/fxRzrtsdzseLT9AUphYEQkCaxdXj9wGbRtO8l6yDGaMihvBNTRmwuyWOo=@vger.kernel.org X-Gm-Message-State: AOJu0YwrxdvwV2Jsv3m8LpKXP0133hKfuUWZZIVhovDcZg9wD6Y+wczk Ho8cPtLto5dJX2+8tZWyt0DGtb9MuM1eYPmXBcJsyImX4bsPs/yWeRNp X-Gm-Gg: AZuq6aLJSgPQfwtda8TCdq9t5Ehl7ybkoXogEvItN6IdUmTFGjEin5dc3u4nFvW/iq7 3EcCxyYp9DZX2S5JQwssQUaOuD3KAcn29E1Kv15gEiRgY6p1jLnMh8oJyNvI5pqMVpDlaEGufv8 7l3qCoPhyuWj5wXGF2Qsy5y5J0NuuWk03iC0ulm0XVGuLcmkRuvWOMbHR1KS3h1kjeJCVZte8Ub YKf92z/6750PWWAhHDRa217Vx9y4qH3IX3uTB4PhhEN/Ll50dnQA70jQGsGEuuYEivmhPNZ7WiA xPQvm3Tsu1i5HtT113FbYjH3kVz8B68i3htvXMb2smz7iGxZjRDBi1VArlH55vqyvncF3VSg9i0 4munFk9aOfT3qD8ErOL0qXOr+j2ODTyhagMlqZnkY80MzfihcWsGrEwx8XefM7JpIcI5Hov475Z lOCknHFh5Q9eKatdj0N3ePiq+LrRKZ8QKl9dp/vTB7cgiLVQ/KcQxDbQFB4vQAZcat X-Received: by 2002:a17:906:9f85:b0:b87:2681:f608 with SMTP id a640c23a62f3a-b8e9f644b9bmr16634366b.8.1770144991764; Tue, 03 Feb 2026 10:56:31 -0800 (PST) Received: from laptok.lan (87-205-5-123.static.ip.netia.com.pl. [87.205.5.123]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8e9fad97a7sm16715766b.0.2026.02.03.10.56.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Feb 2026 10:56:31 -0800 (PST) From: =?UTF-8?q?Tomasz=20Paku=C5=82a?= To: alexander.deucher@amd.com, harry.wentland@amd.com, sunpeng.li@amd.com Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, siqueira@igalia.com, dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, tomasz.pakula.oficjalny@gmail.com, bernhard.berger@gmail.com, michel.daenzer@mailbox.org, daniel@fooishbar.org, admin@ptr1337.dev Subject: [PATCH v3 02/19] drm/amd/display: Refactor amdgpu_dm_update_freesync_caps() Date: Tue, 3 Feb 2026 19:56:09 +0100 Message-ID: <20260203185626.55428-3-tomasz.pakula.oficjalny@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260203185626.55428-1-tomasz.pakula.oficjalny@gmail.com> References: <20260203185626.55428-1-tomasz.pakula.oficjalny@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit [Why] This function started to get very messy and hard to follow. [How] Eject some functionality to separate functions and simplify greatly. Changes in v3: - Less struct traversal in helper functions Signed-off-by: Tomasz PakuĊ‚a --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 123 +++++++++++------- 1 file changed, 73 insertions(+), 50 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 29e4a047b455..2c5877ed5f32 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -13119,8 +13119,8 @@ static void parse_edid_displayid_vrr(struct drm_connector *connector, } } -static int parse_amd_vsdb(struct amdgpu_dm_connector *aconnector, - const struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info) +static int parse_amd_vsdb_did(struct amdgpu_dm_connector *aconnector, + const struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info) { u8 *edid_ext = NULL; int i; @@ -13172,13 +13172,13 @@ static int parse_amd_vsdb(struct amdgpu_dm_connector *aconnector, return false; } -static int parse_hdmi_amd_vsdb(struct amdgpu_dm_connector *aconnector, - const struct edid *edid, - struct amdgpu_hdmi_vsdb_info *vsdb_info) +static int parse_amd_vsdb_cea(struct amdgpu_dm_connector *aconnector, + const struct edid *edid, + struct amdgpu_hdmi_vsdb_info *vsdb_info) { + struct amdgpu_hdmi_vsdb_info vsdb_local = {0}; u8 *edid_ext = NULL; int i; - bool valid_vsdb_found = false; /*----- drm_find_cea_extension() -----*/ /* No EDID or EDID extensions */ @@ -13199,9 +13199,47 @@ static int parse_hdmi_amd_vsdb(struct amdgpu_dm_connector *aconnector, if (edid_ext[0] != CEA_EXT) return -ENODEV; - valid_vsdb_found = parse_edid_cea(aconnector, edid_ext, EDID_LENGTH, vsdb_info); + if (!parse_edid_cea(aconnector, edid_ext, EDID_LENGTH, &vsdb_local)) + return -ENODEV; - return valid_vsdb_found ? i : -ENODEV; + *vsdb_info = vsdb_local; + return i; +} + +static bool is_monitor_range_invalid(const struct drm_connector *conn) +{ + return conn->display_info.monitor_range.min_vfreq == 0 || + conn->display_info.monitor_range.max_vfreq == 0; +} + +/* + * Returns true if (max_vfreq - min_vfreq) > 10 + */ +static bool is_freesync_capable(const struct drm_monitor_range_info *range) +{ + return (range->max_vfreq - range->min_vfreq) > 10; +} + +static void monitor_range_from_vsdb(struct drm_display_info *display, + const struct amdgpu_hdmi_vsdb_info *vsdb) +{ + display->monitor_range.min_vfreq = vsdb->min_refresh_rate_hz; + display->monitor_range.max_vfreq = vsdb->max_refresh_rate_hz; +} + +/* + * Returns true if connector is capable of freesync + * Optionally, can fetch the range from AMD vsdb + */ +static bool copy_range_to_amdgpu_connector(struct drm_connector *conn) +{ + struct amdgpu_dm_connector *aconn = to_amdgpu_dm_connector(conn); + struct drm_monitor_range_info *range = &conn->display_info.monitor_range; + + aconn->min_vfreq = range->min_vfreq; + aconn->max_vfreq = range->max_vfreq; + + return is_freesync_capable(range); } /** @@ -13218,13 +13256,14 @@ static int parse_hdmi_amd_vsdb(struct amdgpu_dm_connector *aconnector, void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, const struct drm_edid *drm_edid) { - int i = 0; struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector); struct dm_connector_state *dm_con_state = NULL; struct dc_sink *sink; struct amdgpu_device *adev = drm_to_adev(connector->dev); struct amdgpu_hdmi_vsdb_info vsdb_info = {0}; + struct amdgpu_hdmi_vsdb_info vsdb_did = {0}; + struct dpcd_caps dpcd_caps = {0}; const struct edid *edid; bool freesync_capable = false; enum adaptive_sync_type as_type = ADAPTIVE_SYNC_TYPE_NONE; @@ -13256,62 +13295,46 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, goto update; edid = drm_edid_raw(drm_edid); // FIXME: Get rid of drm_edid_raw() + parse_amd_vsdb_cea(amdgpu_dm_connector, edid, &vsdb_info); + + if (amdgpu_dm_connector->dc_link) + dpcd_caps = amdgpu_dm_connector->dc_link->dpcd_caps; /* Some eDP panels only have the refresh rate range info in DisplayID */ - if ((connector->display_info.monitor_range.min_vfreq == 0 || - connector->display_info.monitor_range.max_vfreq == 0)) + if (is_monitor_range_invalid(connector)) parse_edid_displayid_vrr(connector, edid); - if (edid && (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT || - sink->sink_signal == SIGNAL_TYPE_EDP)) { - if (amdgpu_dm_connector->dc_link && - amdgpu_dm_connector->dc_link->dpcd_caps.allow_invalid_MSA_timing_param) { - amdgpu_dm_connector->min_vfreq = connector->display_info.monitor_range.min_vfreq; - amdgpu_dm_connector->max_vfreq = connector->display_info.monitor_range.max_vfreq; - if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10) - freesync_capable = true; - } + if (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT || + sink->sink_signal == SIGNAL_TYPE_EDP) { - parse_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info); + if (dpcd_caps.allow_invalid_MSA_timing_param) + freesync_capable = copy_range_to_amdgpu_connector(connector); - if (vsdb_info.replay_mode) { - amdgpu_dm_connector->vsdb_info.replay_mode = vsdb_info.replay_mode; - amdgpu_dm_connector->vsdb_info.amd_vsdb_version = vsdb_info.amd_vsdb_version; + /* eDP */ + if (edid) + parse_amd_vsdb_did(amdgpu_dm_connector, edid, &vsdb_did); + + if (vsdb_did.replay_mode) { + amdgpu_dm_connector->vsdb_info.replay_mode = vsdb_did.replay_mode; + amdgpu_dm_connector->vsdb_info.amd_vsdb_version = vsdb_did.amd_vsdb_version; amdgpu_dm_connector->as_type = ADAPTIVE_SYNC_TYPE_EDP; } - } else if (drm_edid && sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A) { - i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info); - if (i >= 0 && vsdb_info.freesync_supported) { - amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz; - amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz; - if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10) - freesync_capable = true; - - connector->display_info.monitor_range.min_vfreq = vsdb_info.min_refresh_rate_hz; - connector->display_info.monitor_range.max_vfreq = vsdb_info.max_refresh_rate_hz; - } + } else if (sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A && vsdb_info.freesync_supported) { + monitor_range_from_vsdb(&connector->display_info, &vsdb_info); + freesync_capable = copy_range_to_amdgpu_connector(connector); } if (amdgpu_dm_connector->dc_link) as_type = dm_get_adaptive_sync_support_type(amdgpu_dm_connector->dc_link); - if (as_type == FREESYNC_TYPE_PCON_IN_WHITELIST) { - i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info); - if (i >= 0 && vsdb_info.freesync_supported && vsdb_info.amd_vsdb_version > 0) { + if (as_type == FREESYNC_TYPE_PCON_IN_WHITELIST && vsdb_info.freesync_supported) { + amdgpu_dm_connector->pack_sdp_v1_3 = true; + amdgpu_dm_connector->as_type = as_type; + amdgpu_dm_connector->vsdb_info = vsdb_info; - amdgpu_dm_connector->pack_sdp_v1_3 = true; - amdgpu_dm_connector->as_type = as_type; - amdgpu_dm_connector->vsdb_info = vsdb_info; - - amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz; - amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz; - if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10) - freesync_capable = true; - - connector->display_info.monitor_range.min_vfreq = vsdb_info.min_refresh_rate_hz; - connector->display_info.monitor_range.max_vfreq = vsdb_info.max_refresh_rate_hz; - } + monitor_range_from_vsdb(&connector->display_info, &vsdb_info); + freesync_capable = copy_range_to_amdgpu_connector(connector); } update: -- 2.52.0