From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7957330DEC1 for ; Fri, 6 Feb 2026 23:14:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770419680; cv=none; b=PugUGh3rW1ucm870hlufeXUk84H1bdKe+xbvADoqO9xJVECliVBjrmfduv5QvKpU+V+CiJy7w8q9Pbj3WcQ8FgFCTs8avenTpIehEd5/cTIs+8JI2qXMKvvVnVVX2TdKKqaC3kjU9LkYjZScFwjg521Q82hiP+pgqACPgE5WayU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770419680; c=relaxed/simple; bh=8Fd6JSSvHs2BiM9pIl/Sa70BnOtg0HyE8IucNwR6cwU=; h=Subject:To:Cc:From:Date:Message-Id; b=udKsP6lfT0FgWf2Dho8CTPYj43Hkeqfz/M5+DMS3M+K9FXGoZlMnksFNkIR/wigVlRoGWh4wrF3h4g51xmbsLqRIrBEyFVjUn967YZmIq/BJcfXKtlUJig+0DJd1ar1dggkQe7fNZKi2hxFSS2pT3PqJgPqDTHdw8tbiZyuF9Dg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=csjEu8cS; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="csjEu8cS" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1770419680; x=1801955680; h=subject:to:cc:from:date:message-id; bh=8Fd6JSSvHs2BiM9pIl/Sa70BnOtg0HyE8IucNwR6cwU=; b=csjEu8cS4/pUaJL2ugzCTC41y+b81AsQS+QUVa4xQVX/3PcXJHmUpdex 35fPdsibhDBoSnR7xYzDJS2ZppvUUHoAHWvuaIT6Ra9bQmCbsQDwbEHw0 ymzpE9DgR++2dWjH7zTSilEVASWnICw5NAIGa2mqQDie+wsMQjnOlL1hD +8sBQ8VucLMqMBCmzmiiNLZVqVUD1H/nsVyYSwIP27vQSnGOUnCY1vm9i Gibzpk4tnmhteLVj0i68LLkhiZq2ipLBT4qr7G2oyTCnh+CMsDGRzJ1Nq dAH/XTny9BDU0jp9bAVNyCqPf0EWWlgCqXpJSxwWTkIgmcPnoke66D+5k g==; X-CSE-ConnectionGUID: 8wMnmBz2QUOkb1cYfHUOqg== X-CSE-MsgGUID: RgBEOe7US9KBPO0LJa6HgA== X-IronPort-AV: E=McAfee;i="6800,10657,11693"; a="74232674" X-IronPort-AV: E=Sophos;i="6.21,277,1763452800"; d="scan'208";a="74232674" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Feb 2026 15:14:39 -0800 X-CSE-ConnectionGUID: e8UeRZydRM2sdWF4U8Bw7A== X-CSE-MsgGUID: MLiTIwbmRbWPe7Rpwrqwkw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,277,1763452800"; d="scan'208";a="210851507" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by fmviesa008.fm.intel.com with ESMTP; 06 Feb 2026 15:14:39 -0800 Subject: [PATCH 0/6] [v2] x86/cpu: Take Intel platform into account for old microcode checks To: linux-kernel@vger.kernel.org Cc: sohil.mehta@intel.com, zhao1.liu@intel.com, Dave Hansen , Borislav Petkov , "H. Peter Anvin" , Ingo Molnar , Jon Kohler , Pawan Gupta , "Peter Zijlstra (Intel)" , Thomas Gleixner , Tony Luck , x86@kernel.org From: Dave Hansen Date: Fri, 06 Feb 2026 15:14:38 -0800 Message-Id: <20260206231438.720FF4E3@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Changes from v1: * Fix non-x86 PECI compile issues by lifting some x86 macros into an arch-independent header. * Make intel_get_platform_id() match its name and return an ID, not a mask. * Sort #includes * Move ->x86_platform_id comment The platform ID vs. platform mask confusion meant that v1 worked by total accident. If you tested v1, I'd really appreciate you retest this as well. -- There was a report[1] that CPUs running updated microcode were being reported as running old microcode. The reason is that the old microcode list neglects to take the platform ID into account. The platform ID is an Intel-only construct that allows CPUs that otherwise have the same model/family/stepping to take different microcode revisions. The microcode loader itself already checks this. Only the recent "old_microcode" checker failed here. Treat the platform ID as a peer of model/family/stepping. Store it in 'struct cpuinfo_x86', enable matching on it with with 'struct x86_cpu_id', and flesh out the 'old_microcode' list with it. This fixes the report of an inaccurate, false positive in the 'old_microcode' vulnerability file. 1. https://lore.kernel.org/all/38660F8F-499E-48CD-B58B-4822228A5941@nutanix.com/ Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: "H. Peter Anvin" Cc: Tony Luck Cc: Pawan Gupta Cc: "Peter Zijlstra (Intel)" Cc: x86@kernel.org Cc: Jon Kohler