From: Jamie Liu <jamieliu@google.com>
To: Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Borislav Petkov <bp@alien8.de>
Cc: Thomas Gleixner <tglx@kernel.org>, Ingo Molnar <mingo@redhat.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Jamie Liu <jamieliu@google.com>
Subject: [PATCH] KVM: x86: Virtualize AMD CPUID faulting
Date: Tue, 10 Feb 2026 13:09:11 -0800 [thread overview]
Message-ID: <20260210210911.1118316-1-jamieliu@google.com> (raw)
CPUID faulting via MSR_MISC_FEATURES_ENABLES_CPUID_FAULT is only used on
Intel CPUs. The mechanism virtualized by this change is used on AMD
CPUs. See arch/x86/kernel/cpu/amd.c:bsp_init_amd(),
arch/x86/kernel/process.c:set_cpuid_faulting().
Signed-off-by: Jamie Liu <jamieliu@google.com>
---
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/kvm/cpuid.c | 2 +-
arch/x86/kvm/cpuid.h | 28 +++++++++++++++++-----------
arch/x86/kvm/x86.c | 14 +++++++++-----
4 files changed, 28 insertions(+), 17 deletions(-)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 3d0a0950d20a..79600fb551cf 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -880,6 +880,7 @@
#define MSR_K7_HWCR_IRPERF_EN_BIT 30
#define MSR_K7_HWCR_IRPERF_EN BIT_ULL(MSR_K7_HWCR_IRPERF_EN_BIT)
#define MSR_K7_HWCR_CPUID_USER_DIS_BIT 35
+#define MSR_K7_HWCR_CPUID_USER_DIS BIT_ULL(MSR_K7_HWCR_CPUID_USER_DIS_BIT)
#define MSR_K7_FID_VID_CTL 0xc0010041
#define MSR_K7_FID_VID_STATUS 0xc0010042
#define MSR_K7_HWCR_CPB_DIS_BIT 25
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 88a5426674a1..1dba0982e543 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -1221,7 +1221,7 @@ void kvm_set_cpu_caps(void)
F(PREFETCHI),
EMULATED_F(NO_SMM_CTL_MSR),
/* PrefetchCtlMsr */
- /* GpOnUserCpuid */
+ EMULATED_F(GP_ON_USER_CPUID),
/* EPSF */
SYNTHESIZED_F(SBPB),
SYNTHESIZED_F(IBPB_BRTYPE),
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index d3f5ae15a7ca..9ca8321762fb 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -173,17 +173,6 @@ static inline int guest_cpuid_stepping(struct kvm_vcpu *vcpu)
return x86_stepping(best->eax);
}
-static inline bool supports_cpuid_fault(struct kvm_vcpu *vcpu)
-{
- return vcpu->arch.msr_platform_info & MSR_PLATFORM_INFO_CPUID_FAULT;
-}
-
-static inline bool cpuid_fault_enabled(struct kvm_vcpu *vcpu)
-{
- return vcpu->arch.msr_misc_features_enables &
- MSR_MISC_FEATURES_ENABLES_CPUID_FAULT;
-}
-
static __always_inline void kvm_cpu_cap_clear(unsigned int x86_feature)
{
unsigned int x86_leaf = __feature_leaf(x86_feature);
@@ -267,6 +256,23 @@ static __always_inline bool guest_cpu_cap_has(struct kvm_vcpu *vcpu,
return vcpu->arch.cpu_caps[x86_leaf] & __feature_bit(x86_feature);
}
+static inline bool supports_cpuid_fault_intel(struct kvm_vcpu *vcpu)
+{
+ return vcpu->arch.msr_platform_info & MSR_PLATFORM_INFO_CPUID_FAULT;
+}
+
+static inline bool supports_cpuid_fault_amd(struct kvm_vcpu *vcpu)
+{
+ return guest_cpu_cap_has(vcpu, X86_FEATURE_GP_ON_USER_CPUID);
+}
+
+static inline bool cpuid_fault_enabled(struct kvm_vcpu *vcpu)
+{
+ return (vcpu->arch.msr_misc_features_enables &
+ MSR_MISC_FEATURES_ENABLES_CPUID_FAULT) ||
+ (vcpu->arch.msr_hwcr & MSR_K7_HWCR_CPUID_USER_DIS);
+}
+
static inline bool kvm_vcpu_is_legal_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
{
if (guest_cpu_cap_has(vcpu, X86_FEATURE_LAM))
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 72d37c8930ad..9140f66b21c6 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -3992,14 +3992,18 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
data &= ~(u64)0x8; /* ignore TLB cache disable */
/*
- * Allow McStatusWrEn and TscFreqSel. (Linux guests from v3.2
- * through at least v6.6 whine if TscFreqSel is clear,
- * depending on F/M/S.
+ * Allow McStatusWrEn, TscFreqSel, and CpuidUserDis. (Linux
+ * guests from v3.2 through at least v6.6 whine if TscFreqSel
+ * is clear, depending on F/M/S.)
*/
- if (data & ~(BIT_ULL(18) | BIT_ULL(24))) {
+ if (data & ~(BIT_ULL(18) | BIT_ULL(24) |
+ MSR_K7_HWCR_CPUID_USER_DIS)) {
kvm_pr_unimpl_wrmsr(vcpu, msr, data);
return 1;
}
+ if (data & MSR_K7_HWCR_CPUID_USER_DIS &&
+ !supports_cpuid_fault_amd(vcpu))
+ return 1;
vcpu->arch.msr_hwcr = data;
break;
case MSR_FAM10H_MMIO_CONF_BASE:
@@ -4248,7 +4252,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
case MSR_MISC_FEATURES_ENABLES:
if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
(data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
- !supports_cpuid_fault(vcpu)))
+ !supports_cpuid_fault_intel(vcpu)))
return 1;
vcpu->arch.msr_misc_features_enables = data;
break;
--
2.53.0.239.g8d8fc8a987-goog
next reply other threads:[~2026-02-10 21:09 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-10 21:09 Jamie Liu [this message]
2026-02-10 23:23 ` Jim Mattson
2026-02-11 13:50 ` Sean Christopherson
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