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From: Srinivas Neeli <srinivas.neeli@amd.com>
To: <vkoul@kernel.org>
Cc: <michal.simek@amd.com>, <robh@kernel.org>, <krzk+dt@kernel.org>,
	<conor+dt@kernel.org>, <suraj.gupta2@amd.com>,
	<abin.joseph@amd.com>, <radhey.shyam.pandey@amd.com>,
	<dev@folker-schwesinger.de>, <thomas.gessler@brueckmann-gmbh.de>,
	<tomi.valkeinen@ideasonboard.com>, <dmaengine@vger.kernel.org>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <git@amd.com>,
	<srinivas.neeli@amd.com>
Subject: [PATCH 3/7] dmaengine: xilinx_dma: Move descriptors to done list based on completion bit
Date: Thu, 12 Feb 2026 19:21:42 +0530	[thread overview]
Message-ID: <20260212135146.1185416-4-srinivas.neeli@amd.com> (raw)
In-Reply-To: <20260212135146.1185416-1-srinivas.neeli@amd.com>

In AXIMCDMA scatter-gather mode, the hardware sets the completion bit when
a transfer finishes. The driver now checks this bit to free descriptors
from the active list and move them to the done list.
This is required when interrupt delay timeout Dly_IrqEn is enabled,
as interrupts may be triggered before the configured threshold is reached,
even if not all descriptors have completed.

Signed-off-by: Srinivas Neeli <srinivas.neeli@amd.com>
---
 drivers/dma/xilinx/xilinx_dma.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index e09a22721c01..e3f8c0f09a17 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -1762,6 +1762,18 @@ static void xilinx_dma_complete_descriptor(struct xilinx_dma_chan *chan)
 					      struct xilinx_axidma_tx_segment, node);
 			if (!(seg->hw.status & XILINX_DMA_BD_COMP_MASK) && chan->has_sg)
 				break;
+		} else if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIMCDMA) {
+			struct xilinx_aximcdma_tx_segment *seg;
+			bool completed;
+
+			seg = list_last_entry(&desc->segments,
+					      struct xilinx_aximcdma_tx_segment,
+					      node);
+			completed = (chan->direction == DMA_DEV_TO_MEM) ?
+				(seg->hw.s2mm_status & XILINX_DMA_BD_COMP_MASK) :
+				(seg->hw.mm2s_status & XILINX_DMA_BD_COMP_MASK);
+			if (!completed)
+				break;
 		}
 		if (chan->has_sg && chan->xdev->dma_config->dmatype !=
 		    XDMA_TYPE_VDMA)
-- 
2.25.1


  parent reply	other threads:[~2026-02-12 13:52 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-12 13:51 [PATCH 0/7] dmaengine: xilinx_dma: MCDMA descriptor and metadata handling improvements Srinivas Neeli
2026-02-12 13:51 ` [PATCH 1/7] dmaengine: xilinx_dma: Fix MCDMA descriptor fields for MM2S vs S2MM Srinivas Neeli
2026-02-12 13:51 ` [PATCH 2/7] dt-bindings: dmaengine: xilinx_dma: Move xlnx,irq-delay to common AXI DMA and MCDMA section Srinivas Neeli
2026-02-12 16:30   ` Krzysztof Kozlowski
2026-02-12 13:51 ` Srinivas Neeli [this message]
2026-02-12 13:51 ` [PATCH 4/7] dt-bindings: xilinx-dma: Extend 'xlnx,axistream-connected' property to MCDMA Srinivas Neeli
2026-02-12 13:51 ` [PATCH 5/7] dmaengine: xilinx_dma: Extend metadata handling for AXI MCDMA Srinivas Neeli
2026-02-12 13:51 ` [PATCH 6/7] dt-bindings: dmaengine: xilinx_dma: Add "xlnx,include-stscntrl-strm" property Srinivas Neeli
2026-02-12 16:29   ` Krzysztof Kozlowski
2026-02-12 13:51 ` [PATCH 7/7] dmaengine: xilinx_dma: Add support for reporting transfer size to AXI DMA / MCDMA client when app fields are unavailable Srinivas Neeli

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