From: Antoniu Miclaus <antoniu.miclaus@analog.com>
To: "Antoniu Miclaus" <antoniu.miclaus@analog.com>,
"Lars-Peter Clausen" <lars@metafoo.de>,
"Michael Hennerich" <Michael.Hennerich@analog.com>,
"Jonathan Cameron" <jic23@kernel.org>,
"David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
linux-iio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Andy Shevchenko <andriy.shevchenko@intel.com>
Subject: [PATCH v3 2/2] iio: adc: ad4080: add support for AD4082, AD4085 and AD4088
Date: Mon, 16 Feb 2026 17:11:11 +0200 [thread overview]
Message-ID: <20260216151112.139359-3-antoniu.miclaus@analog.com> (raw)
In-Reply-To: <20260216151112.139359-1-antoniu.miclaus@analog.com>
Add support for the AD4082, AD4085 and AD4088 SAR ADCs. These devices
share the same resolution as their base variants but differ in LVDS CNV
clock count maximum:
- AD4082 (20-bit, like AD4080): lvds_cnv_clk_cnt_max 8 vs 7
- AD4085 (16-bit, like AD4084): lvds_cnv_clk_cnt_max 8 vs 2
- AD4088 (14-bit, like AD4087): lvds_cnv_clk_cnt_max 8 vs 1
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
Changes in v3:
- Merged individual per-device driver patches into a single patch
adding AD4082, AD4085 and AD4088.
drivers/iio/adc/ad4080.c | 45 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 7cf3b6ed7940..fc261d3d7687 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -127,10 +127,13 @@
#define AD4080_SPI_READ BIT(7)
#define AD4080_CHIP_ID 0x0050
#define AD4081_CHIP_ID 0x0051
+#define AD4082_CHIP_ID 0x0052
#define AD4083_CHIP_ID 0x0053
#define AD4084_CHIP_ID 0x0054
+#define AD4085_CHIP_ID 0x0055
#define AD4086_CHIP_ID 0x0056
#define AD4087_CHIP_ID 0x0057
+#define AD4088_CHIP_ID 0x0058
#define AD4080_LVDS_CNV_CLK_CNT_MAX 7
@@ -442,14 +445,20 @@ static const struct iio_chan_spec ad4080_channel = AD4080_CHANNEL_DEFINE(20, 32)
static const struct iio_chan_spec ad4081_channel = AD4080_CHANNEL_DEFINE(20, 32);
+static const struct iio_chan_spec ad4082_channel = AD4080_CHANNEL_DEFINE(20, 32);
+
static const struct iio_chan_spec ad4083_channel = AD4080_CHANNEL_DEFINE(16, 16);
static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
+static const struct iio_chan_spec ad4085_channel = AD4080_CHANNEL_DEFINE(16, 16);
+
static const struct iio_chan_spec ad4086_channel = AD4080_CHANNEL_DEFINE(14, 16);
static const struct iio_chan_spec ad4087_channel = AD4080_CHANNEL_DEFINE(14, 16);
+static const struct iio_chan_spec ad4088_channel = AD4080_CHANNEL_DEFINE(14, 16);
+
static const struct ad4080_chip_info ad4080_chip_info = {
.name = "ad4080",
.product_id = AD4080_CHIP_ID,
@@ -470,6 +479,16 @@ static const struct ad4080_chip_info ad4081_chip_info = {
.lvds_cnv_clk_cnt_max = 2,
};
+static const struct ad4080_chip_info ad4082_chip_info = {
+ .name = "ad4082",
+ .product_id = AD4082_CHIP_ID,
+ .scale_table = ad4080_scale_table,
+ .num_scales = ARRAY_SIZE(ad4080_scale_table),
+ .num_channels = 1,
+ .channels = &ad4082_channel,
+ .lvds_cnv_clk_cnt_max = 8,
+};
+
static const struct ad4080_chip_info ad4083_chip_info = {
.name = "ad4083",
.product_id = AD4083_CHIP_ID,
@@ -490,6 +509,16 @@ static const struct ad4080_chip_info ad4084_chip_info = {
.lvds_cnv_clk_cnt_max = 2,
};
+static const struct ad4080_chip_info ad4085_chip_info = {
+ .name = "ad4085",
+ .product_id = AD4085_CHIP_ID,
+ .scale_table = ad4080_scale_table,
+ .num_scales = ARRAY_SIZE(ad4080_scale_table),
+ .num_channels = 1,
+ .channels = &ad4085_channel,
+ .lvds_cnv_clk_cnt_max = 8,
+};
+
static const struct ad4080_chip_info ad4086_chip_info = {
.name = "ad4086",
.product_id = AD4086_CHIP_ID,
@@ -510,6 +539,16 @@ static const struct ad4080_chip_info ad4087_chip_info = {
.lvds_cnv_clk_cnt_max = 1,
};
+static const struct ad4080_chip_info ad4088_chip_info = {
+ .name = "ad4088",
+ .product_id = AD4088_CHIP_ID,
+ .scale_table = ad4080_scale_table,
+ .num_scales = ARRAY_SIZE(ad4080_scale_table),
+ .num_channels = 1,
+ .channels = &ad4088_channel,
+ .lvds_cnv_clk_cnt_max = 8,
+};
+
static int ad4080_setup(struct iio_dev *indio_dev)
{
struct ad4080_state *st = iio_priv(indio_dev);
@@ -666,10 +705,13 @@ static int ad4080_probe(struct spi_device *spi)
static const struct spi_device_id ad4080_id[] = {
{ "ad4080", (kernel_ulong_t)&ad4080_chip_info },
{ "ad4081", (kernel_ulong_t)&ad4081_chip_info },
+ { "ad4082", (kernel_ulong_t)&ad4082_chip_info },
{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
+ { "ad4085", (kernel_ulong_t)&ad4085_chip_info },
{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
{ "ad4087", (kernel_ulong_t)&ad4087_chip_info },
+ { "ad4088", (kernel_ulong_t)&ad4088_chip_info },
{ }
};
MODULE_DEVICE_TABLE(spi, ad4080_id);
@@ -677,10 +719,13 @@ MODULE_DEVICE_TABLE(spi, ad4080_id);
static const struct of_device_id ad4080_of_match[] = {
{ .compatible = "adi,ad4080", &ad4080_chip_info },
{ .compatible = "adi,ad4081", &ad4081_chip_info },
+ { .compatible = "adi,ad4082", &ad4082_chip_info },
{ .compatible = "adi,ad4083", &ad4083_chip_info },
{ .compatible = "adi,ad4084", &ad4084_chip_info },
+ { .compatible = "adi,ad4085", &ad4085_chip_info },
{ .compatible = "adi,ad4086", &ad4086_chip_info },
{ .compatible = "adi,ad4087", &ad4087_chip_info },
+ { .compatible = "adi,ad4088", &ad4088_chip_info },
{ }
};
MODULE_DEVICE_TABLE(of, ad4080_of_match);
--
2.43.0
next prev parent reply other threads:[~2026-02-16 15:12 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-16 15:11 [PATCH v3 0/2] " Antoniu Miclaus
2026-02-16 15:11 ` [PATCH v3 1/2] dt-bindings: iio: adc: adi,ad4080: " Antoniu Miclaus
2026-02-16 15:11 ` Antoniu Miclaus [this message]
2026-02-22 13:21 ` [PATCH v3 0/2] iio: adc: ad4080: " Jonathan Cameron
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