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[87.205.5.123]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8fc735d185sm264683866b.14.2026.02.16.08.45.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Feb 2026 08:45:53 -0800 (PST) From: =?UTF-8?q?Tomasz=20Paku=C5=82a?= To: alexander.deucher@amd.com, harry.wentland@amd.com, sunpeng.li@amd.com Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, siqueira@igalia.com, dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, tomasz.pakula.oficjalny@gmail.com, bernhard.berger@gmail.com, michel.daenzer@mailbox.org, daniel@fooishbar.org Subject: [PATCH v4 26/27] drm/amd/display: Use passive_vrr properties in amdgpu Date: Mon, 16 Feb 2026 17:45:15 +0100 Message-ID: <20260216164516.36803-27-tomasz.pakula.oficjalny@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260216164516.36803-1-tomasz.pakula.oficjalny@gmail.com> References: <20260216164516.36803-1-tomasz.pakula.oficjalny@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit [How] Attach and use this properties for HDMI sinks which are troublesome with their VRR state transitions. Hook into already-established freesync_on_desktop logic. Signed-off-by: Tomasz PakuĊ‚a --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 26 ++++++++++++++++--- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 + 2 files changed, 23 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 6a2806cc800a..41677c50b3d2 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -7850,6 +7850,8 @@ amdgpu_dm_connector_atomic_duplicate_state(struct drm_connector *connector) __drm_atomic_helper_connector_duplicate_state(connector, &new_state->base); new_state->freesync_capable = state->freesync_capable; + new_state->freesync_on_desktop_capable = + state->freesync_on_desktop_capable; new_state->abm_level = state->abm_level; new_state->scaling = state->scaling; new_state->underscan_enable = state->underscan_enable; @@ -9057,8 +9059,10 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm, connector_type == DRM_MODE_CONNECTOR_eDP) { drm_connector_attach_hdr_output_metadata_property(&aconnector->base); - if (!aconnector->mst_root) + if (!aconnector->mst_root) { drm_connector_attach_vrr_capable_property(&aconnector->base); + drm_connector_attach_passive_vrr_capable_property(&aconnector->base); + } if (adev->dm.hdcp_workqueue) drm_connector_attach_content_protection_property(&aconnector->base, true); @@ -11338,6 +11342,12 @@ static void get_freesync_config_for_crtc( config.vsif_supported = true; config.btr = true; + if (new_con_state->freesync_on_desktop_capable) + new_crtc_state->stream->freesync_on_desktop = + !new_crtc_state->base.passive_vrr_disabled; + else + new_crtc_state->stream->freesync_on_desktop = false; + if (fs_vid_mode) { config.state = VRR_STATE_ACTIVE_FIXED; config.fixed_refresh_in_uhz = new_crtc_state->freesync_config.fixed_refresh_in_uhz; @@ -11349,6 +11359,7 @@ static void get_freesync_config_for_crtc( } } else { config.state = VRR_STATE_UNSUPPORTED; + new_crtc_state->stream->freesync_on_desktop = false; } out: new_crtc_state->freesync_config = config; @@ -13352,6 +13363,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, struct drm_hdmi_vrr_cap hdmi_vrr = {0}; struct dpcd_caps dpcd_caps = {0}; const struct edid *edid; + bool freesync_on_desktop = false; bool freesync_capable = false; bool pcon_allowed = false; bool is_pcon = false; @@ -13431,6 +13443,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, monitor_range_from_vsdb(&connector->display_info, &vsdb_info); freesync_capable = copy_range_to_amdgpu_connector(connector); + freesync_on_desktop = freesync_capable; /* DP -> HDMI PCON */ } else if (pcon_allowed) { @@ -13445,11 +13458,14 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, amdgpu_dm_connector->pack_sdp_v1_3 = true; amdgpu_dm_connector->as_type = ADAPTIVE_SYNC_TYPE_PCON_ALLOWED; freesync_capable = copy_range_to_amdgpu_connector(connector); + freesync_on_desktop = freesync_capable; } update: - if (dm_con_state) + if (dm_con_state) { dm_con_state->freesync_capable = freesync_capable; + dm_con_state->freesync_on_desktop_capable = freesync_on_desktop; + } if (connector->state && amdgpu_dm_connector->dc_link && !freesync_capable && amdgpu_dm_connector->dc_link->replay_settings.config.replay_supported) { @@ -13458,8 +13474,10 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, } if (connector->vrr_capable_property) - drm_connector_set_vrr_capable_property(connector, - freesync_capable); + drm_connector_set_vrr_capable_property(connector, freesync_capable); + + if (connector->passive_vrr_capable_property) + drm_connector_set_passive_vrr_capable_property(connector, freesync_on_desktop); } void amdgpu_dm_trigger_timing_sync(struct drm_device *dev) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h index 800813671748..88ec2b88dcaf 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h @@ -1020,6 +1020,7 @@ struct dm_connector_state { uint8_t underscan_hborder; bool underscan_enable; bool freesync_capable; + bool freesync_on_desktop_capable; bool update_hdcp; bool abm_sysfs_forbidden; uint8_t abm_level; -- 2.53.0