From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from casper.infradead.org (casper.infradead.org [90.155.50.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC42A19E992 for ; Thu, 19 Feb 2026 11:35:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.50.34 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771500960; cv=none; b=ao87phYKKTWnb6N4KUHJdWCbsZTKJul9COEF+tnI7wDj3Z4Z/iktSj3E/xr7IG8z8HsGLuKQ6ozQsRevU6vJDiqFsYHZ0Bm8nP1eJDAIE5osg0kBiru9bMmMJIMwqwAMC/CEv1y0ucD4pVPrWlFTOhRiNrXnjrfaiewdRPZhNds= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771500960; c=relaxed/simple; bh=TYZdgv4PCG+osUAljY+9PDBEZ5B69SUq3f6VavvggLA=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=ruSe+x6YgBIb8JWwx3ac2/N9Y3T1il+Q18Y2Ci1axLHTC3UZeNlA+/DZN6XKtPwIJWYnb9BnDn/3o+rocJMTQ7Xw27gXuO8O3F5z+obA5CGN+FE8ePdYVjkFyTNnmxv+WbTDU6Qfc3EnU5uZs+SZKtbir367l6qaP2wRVO1rtIQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org; spf=none smtp.mailfrom=infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=HQRKKBHP; arc=none smtp.client-ip=90.155.50.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="HQRKKBHP" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=dQYbAr3bZNsz4J0YD7trdhytYgXwkMP+z4/d65K0NdI=; b=HQRKKBHP0gPrM4FMUV6LsLGCvX Ct9z2/+jprlRCBPmTTku0b1tN1Q238v7V3EVKPRvlRBrFBWt6vwUMNqrXdErZRQiKFiAqtqMZwyiM qsy1EZYmaBHsTftMOmMrePjIixrQAXueFAxvG5gXT0lyJAnjd3Jjw0S+Tj+UuGSWd3CZR7GLCEUWA G+6tKyvYg5Pt2IqhOMec9As+DN/4PrewyiLG/hBNVBSpocq4feVlOC+Cgk/bwX0BoOqfAXzDXtrVb jrm09q+1c7fBZMuYfifKmuoTyj+y5/KiTE07r0DzH7KxvGSysOZIC3/RQFfFmcwr6NZymOY2Sk/zu k1qaqBHQ==; Received: from 2001-1c00-8d85-5700-266e-96ff-fe07-7dcc.cable.dynamic.v6.ziggo.nl ([2001:1c00:8d85:5700:266e:96ff:fe07:7dcc] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.98.2 #2 (Red Hat Linux)) id 1vt2JY-00000007Xhq-2GXq; Thu, 19 Feb 2026 11:35:24 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id 354E13011E4; Thu, 19 Feb 2026 12:35:23 +0100 (CET) Date: Thu, 19 Feb 2026 12:35:23 +0100 From: Peter Zijlstra To: Tim Chen Cc: Ingo Molnar , K Prateek Nayak , "Gautham R . Shenoy" , Vincent Guittot , Chen Yu , Juri Lelli , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , Madadi Vineeth Reddy , Hillf Danton , Shrikanth Hegde , Jianyong Wu , Yangyu Chen , Tingyin Duan , Vern Hao , Vern Hao , Len Brown , Aubrey Li , Zhao Liu , Chen Yu , Adam Li , Aaron Lu , Tim Chen , Josh Don , Gavin Guo , Qais Yousef , Libo Chen , linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 04/21] sched/cache: Make LLC id continuous Message-ID: <20260219113523.GG1395266@noisy.programming.kicks-ass.net> References: <60a05a3f50d14a7bf3b968f62cca87893c5c552c.1770760558.git.tim.c.chen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <60a05a3f50d14a7bf3b968f62cca87893c5c552c.1770760558.git.tim.c.chen@linux.intel.com> On Tue, Feb 10, 2026 at 02:18:44PM -0800, Tim Chen wrote: > From: Chen Yu > > Introduce an index mapping between CPUs and their LLCs. This provides > a continuous per LLC index needed for cache-aware load balancing in > later patches. > > The existing per_cpu llc_id usually points to the first CPU of the > LLC domain, which is sparse and unsuitable as an array index. Using > llc_id directly would waste memory. > > With the new mapping, CPUs in the same LLC share a continuous id: > > per_cpu(llc_id, CPU=0...15) = 0 > per_cpu(llc_id, CPU=16...31) = 1 > per_cpu(llc_id, CPU=32...47) = 2 > ... > > Once a CPU has been assigned an llc_id, this ID persists even when > the CPU is taken offline and brought back online, which can facilitate > the management of the ID. > > Co-developed-by: Tim Chen > Signed-off-by: Tim Chen > Co-developed-by: K Prateek Nayak > Signed-off-by: K Prateek Nayak > Signed-off-by: Chen Yu Note that Tim is the one sending this email, so his SOB should be last. It is also fine to have a SOB occur multiple times in a chain. Please double check all these SOB chains, because I think this isn't the first one that isn't right (possibly the very first patch already has problems).