From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E97FE2BD030; Fri, 20 Feb 2026 07:32:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771572760; cv=none; b=lOMvhwG/tHr+2FjQ4d71yv/46lP3IQuXvjg6g3RsRePj+v2JRw/RmIVdaoy/FNKGVggkJGWAWyxhzVHM9UqwF6jYtcXPwrb9xmJSTE42EZ6iCdFzY6Ec8stjS5g6HGvddKpx64gFEWCnc4aN6KmCTJz3lAklVj9WAYAoIKgzPE8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771572760; c=relaxed/simple; bh=ja/Au8yYydwcnPjfZRcjcxY2BHygaA1MhU/bDE1G/Rw=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=UkYVAzqwqBhaD93kJUr70MgmsxRgUkGHffd6slTpW2LzwnUW3qgHY/ep0c0OMUcHdmFf30UNqjRGBEKdYQ7Nl7WmlUycCq7TvKPqn93vKDmNZStRYUFS/f/PQp8IPyRf3mnM/kN8TBjuunjO4DjWRqUuq+Y/zDYkoQNs+MtCTZ4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VlmHSu32; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VlmHSu32" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D1C52C116C6; Fri, 20 Feb 2026 07:32:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771572759; bh=ja/Au8yYydwcnPjfZRcjcxY2BHygaA1MhU/bDE1G/Rw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=VlmHSu32hu6dOgrBQ2+YNFe2pUrpAG7xd9zMK0aQcw+yUSeOEtFzA5eCpMbLY6FZp NJnEWpyRyJBGa8XwR/g+DCC4U/y4eSQS1tNAKeGjX1jHJNh6cBg9I/d25BxBfH7zkE OCE8KZf0NSeIv0ZBwpkAOoMrSjZi8WfG/MfH2hVowR2vG++GBvHqdhv6z02rlK5htR B7uYxhy4e/xE/+LMtY4uyGikJnz6vxiUe/ClmsQARZVy5sBNSh2Hh9CKO4Beh05Zxw psQTGqPTO5WEcIbq4wGjbMhXy09VmKUQppHn4Q2mhAXrOO0/7jxLD0TYdSxkKrrz8J 4s6UIuaWZuJqQ== Date: Fri, 20 Feb 2026 08:32:37 +0100 From: Krzysztof Kozlowski To: Taniya Das Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio Subject: Re: [PATCH v3 1/3] dt-bindings: clock: qcom: Add SM8750 GPU clocks Message-ID: <20260220-defiant-qualified-agama-bbe7ee@quoll> References: <20260220-gpucc_sm8750_v2-v3-0-6c5408564c3c@oss.qualcomm.com> <20260220-gpucc_sm8750_v2-v3-1-6c5408564c3c@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260220-gpucc_sm8750_v2-v3-1-6c5408564c3c@oss.qualcomm.com> On Fri, Feb 20, 2026 at 11:24:20AM +0530, Taniya Das wrote: > From: Konrad Dybcio > > The SM8750 features a "traditional" GPU_CC block, much of which is > controlled through the GMU microcontroller. Additionally, there's > an separate GX_CC block, where the GX GDSC is moved. > > Update the bindings to accommodate for SM8750 SoC. > > Signed-off-by: Konrad Dybcio > Signed-off-by: Taniya Das > --- > .../bindings/clock/qcom,kaanapali-gxclkctl.yaml | 1 + > .../bindings/clock/qcom,sm8450-gpucc.yaml | 2 + > include/dt-bindings/clock/qcom,sm8750-gpucc.h | 50 ++++++++++++++++++++++ > 3 files changed, 53 insertions(+) Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof