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[73.183.52.120]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8997c8a771fsm53701036d6.17.2026.02.22.15.51.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Feb 2026 15:51:22 -0800 (PST) From: Brian Masney Date: Sun, 22 Feb 2026 18:51:04 -0500 Subject: [PATCH 1/3] clk: microchip: core: update to use div64_ul() instead of do_div() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260222-clk-microchip-pic32-v1-1-ceacbcd515d1@redhat.com> References: <20260222-clk-microchip-pic32-v1-0-ceacbcd515d1@redhat.com> In-Reply-To: <20260222-clk-microchip-pic32-v1-0-ceacbcd515d1@redhat.com> To: Conor Dooley , Claudiu Beznea , Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Brian Masney , kernel test robot X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1185; i=bmasney@redhat.com; s=20250903; h=from:subject:message-id; bh=CJrk612FhmjDj3VPD/9bUWPYLrlPaYeOFopd1zExvM4=; b=owGbwMvMwCW2/dJd9di6A+2Mp9WSGDJnTytN9V5zKl910yfBFZmvtdX/h361Nk3bFXBO//PU3 uX6P6NPdZSyMIhxMciKKbIsyTUqiEhdZXvvjiYLzBxWJpAhDFycAjARluWMDFOFTQwCRP5ICthv zlxqzmC8syUoaAmfjqU9S8XbsyJxPxkZLn7mLffdaHMrSu6shduyJ5Nzbr06bKNU2Sdxc9uxBqM 2NgA= X-Developer-Key: i=bmasney@redhat.com; a=openpgp; fpr=A46D32705865AA3DDEDC2904B7D2DD275D7EC087 This driver is currently only compiled on 32-bit MIPS systems. When compiling on 64-bit systems, the build fails with: WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead. Let's update this to use div64_ul() in preparation for allowing this driver to be compiled on all architectures. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202601160758.bpkN4546-lkp@intel.com/ Signed-off-by: Brian Masney --- drivers/clk/microchip/clk-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/microchip/clk-core.c b/drivers/clk/microchip/clk-core.c index 692152b5094e00bf5acb19a67cf41e6c86b11f35..2e86ad846a66cd5487f5412c09ab0ad25ebe3f79 100644 --- a/drivers/clk/microchip/clk-core.c +++ b/drivers/clk/microchip/clk-core.c @@ -341,7 +341,7 @@ static void roclk_calc_div_trim(unsigned long rate, div = parent_rate / (rate << 1); frac = parent_rate; frac <<= 8; - do_div(frac, rate); + frac = div64_ul(frac, rate); frac -= (u64)(div << 9); rodiv = (div > REFO_DIV_MASK) ? REFO_DIV_MASK : div; -- 2.53.0