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Mon, 23 Feb 2026 11:09:51 -0800 (PST) Received: from hu-ekangupt-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ad74e34e18sm83501505ad.10.2026.02.23.11.09.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Feb 2026 11:09:50 -0800 (PST) From: Ekansh Gupta Date: Tue, 24 Feb 2026 00:38:58 +0530 Subject: [PATCH RFC 04/18] accel/qda: Add built-in compute CB bus for QDA and integrate with IOMMU Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260224-qda-firstpost-v1-4-fe46a9c1a046@oss.qualcomm.com> References: <20260224-qda-firstpost-v1-0-fe46a9c1a046@oss.qualcomm.com> In-Reply-To: <20260224-qda-firstpost-v1-0-fe46a9c1a046@oss.qualcomm.com> To: Oded Gabbay , Jonathan Corbet , Shuah Khan , Joerg Roedel , Will Deacon , Robin Murphy , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Sumit Semwal , =?utf-8?q?Christian_K=C3=B6nig?= Cc: dri-devel@lists.freedesktop.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, Srinivas Kandagatla , Dmitry Baryshkov , Bharath Kumar , Chenna Kesava Raju , Ekansh Gupta X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1771873753; l=4943; i=ekansh.gupta@oss.qualcomm.com; s=20260223; h=from:subject:message-id; bh=kVGIvUQYd8fYwcDgOBRxiOF7ByQocRT92vAbYBLm9bM=; b=rUIy5HgCLDRhZVp2IzTGLrvCMsULd21ubbtDKIPuQIn9m/tfFsvEGy2LbREw4uK3leLblRQUp ul4rak0R2xhAnwPvhY8PF/SfHK0rFwibTRGVhaul0H1g9UdEczMQ+K5 X-Developer-Key: i=ekansh.gupta@oss.qualcomm.com; a=ed25519; pk=n0SepARizye+pYjhjg1RA5J+Nq4+IJbyRcBybU+/ERQ= X-Authority-Analysis: v=2.4 cv=c5OmgB9l c=1 sm=1 tr=0 ts=699ca600 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=Rss5_8j3o1z-bWaeIIsA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-GUID: fPi3WbaKtp2l3X4Oe16GueCCjzbc64HL X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjIzMDE2NiBTYWx0ZWRfX040/jLmjI0Oh PXf0ml3NQ2k7tqE4CbFvYf78Y3o4/4XS+SRAkgWKLKMNDZcpbNrja4JFD3rdsA6ArzAFIWJnkCp l3HI6OVlcAKI7BUTKamElo7WVJDyEBOCMN2llW0FbEyuwLhJcuRGDrKiKfiHqBou8wlL0BuxokF LH7bmCKH4T3lqnSiS5KdUmYIiW94Jqn0xp+mNWySs/rT5SKKmdFMCuFc1X/mYFRFkjUkBR7tiC1 xD07Iv6gOheqSVYVTKtb8b6F61ZqERCAUigTSbrM+Q9U1Ht2WYZ1jGYpdZd1l4yj+zKkuqgYdx9 OmsK1ZYgOAsUJ5+MuT74g0y3sijTTyvchOJoYybNrg/1LgM9boaFkd466w4cMql99SaiJ7dMpbR wUm0S61cZCX8dYffvQnn+mX/0muHLF49DRF59d/qco6IDBDrP0sILbnim1fXwgXj3OKSHgDUZlp ZqdF3jnaoMws02Rmgjg== X-Proofpoint-ORIG-GUID: fPi3WbaKtp2l3X4Oe16GueCCjzbc64HL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-23_04,2026-02-23_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 bulkscore=0 spamscore=0 suspectscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2602230166 Introduce a built-in compute context-bank (CB) bus used by the Qualcomm DSP accelerator (QDA) driver to represent DSP CB devices that require IOMMU configuration. This separates the CB bus from the QDA driver and allows QDA to remain a loadable module while the bus is always built-in. A new bool Kconfig symbol DRM_ACCEL_QDA_COMPUTE_BUS is added and is selected by the main DRM_ACCEL_QDA driver. The parent accel Makefile is updated to descend into the QDA directory for both built-in and module builds so that the CB bus is compiled into vmlinux while the driver remains modular. The CB bus is registered at postcore_initcall() time and is exposed to the IOMMU core through iommu_buses[] in the same way as the Tegra host1x context-bus. This enables later patches to create CB devices on this bus and obtain IOMMU domains for them. Signed-off-by: Ekansh Gupta --- drivers/accel/Makefile | 1 + drivers/accel/qda/Kconfig | 5 +++++ drivers/accel/qda/Makefile | 2 ++ drivers/accel/qda/qda_compute_bus.c | 23 +++++++++++++++++++++++ drivers/iommu/iommu.c | 4 ++++ include/linux/qda_compute_bus.h | 22 ++++++++++++++++++++++ 6 files changed, 57 insertions(+) diff --git a/drivers/accel/Makefile b/drivers/accel/Makefile index 58c08dd5f389..9ed843cd293f 100644 --- a/drivers/accel/Makefile +++ b/drivers/accel/Makefile @@ -6,4 +6,5 @@ obj-$(CONFIG_DRM_ACCEL_HABANALABS) += habanalabs/ obj-$(CONFIG_DRM_ACCEL_IVPU) += ivpu/ obj-$(CONFIG_DRM_ACCEL_QAIC) += qaic/ obj-$(CONFIG_DRM_ACCEL_QDA) += qda/ +obj-$(CONFIG_DRM_ACCEL_QDA_COMPUTE_BUS) += qda/ obj-$(CONFIG_DRM_ACCEL_ROCKET) += rocket/ \ No newline at end of file diff --git a/drivers/accel/qda/Kconfig b/drivers/accel/qda/Kconfig index 484d21ff1b55..ef1fa384efbe 100644 --- a/drivers/accel/qda/Kconfig +++ b/drivers/accel/qda/Kconfig @@ -3,11 +3,16 @@ # Qualcomm DSP accelerator driver # + +config DRM_ACCEL_QDA_COMPUTE_BUS + bool + config DRM_ACCEL_QDA tristate "Qualcomm DSP accelerator" depends on DRM_ACCEL depends on ARCH_QCOM || COMPILE_TEST depends on RPMSG + select DRM_ACCEL_QDA_COMPUTE_BUS help Enables the DRM-based accelerator driver for Qualcomm's Hexagon DSPs. This driver provides a standardized interface for offloading computational diff --git a/drivers/accel/qda/Makefile b/drivers/accel/qda/Makefile index e7f23182589b..242684ef1af7 100644 --- a/drivers/accel/qda/Makefile +++ b/drivers/accel/qda/Makefile @@ -8,3 +8,5 @@ obj-$(CONFIG_DRM_ACCEL_QDA) := qda.o qda-y := \ qda_drv.o \ qda_rpmsg.o \ + +obj-$(CONFIG_DRM_ACCEL_QDA_COMPUTE_BUS) += qda_compute_bus.o diff --git a/drivers/accel/qda/qda_compute_bus.c b/drivers/accel/qda/qda_compute_bus.c new file mode 100644 index 000000000000..1d9c39948fb5 --- /dev/null +++ b/drivers/accel/qda/qda_compute_bus.c @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +#include +#include + +struct bus_type qda_cb_bus_type = { + .name = "qda-compute-cb", +}; +EXPORT_SYMBOL_GPL(qda_cb_bus_type); + +static int __init qda_cb_bus_init(void) +{ + int err; + + err = bus_register(&qda_cb_bus_type); + if (err < 0) { + pr_err("qda-compute-cb bus registration failed: %d\n", err); + return err; + } + return 0; +} + +postcore_initcall(qda_cb_bus_init); diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 4926a43118e6..5dee912686ee 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include "dma-iommu.h" @@ -178,6 +179,9 @@ static const struct bus_type * const iommu_buses[] = { #ifdef CONFIG_CDX_BUS &cdx_bus_type, #endif +#ifdef CONFIG_DRM_ACCEL_QDA_COMPUTE_BUS + &qda_cb_bus_type, +#endif }; /* diff --git a/include/linux/qda_compute_bus.h b/include/linux/qda_compute_bus.h new file mode 100644 index 000000000000..807122d84e3f --- /dev/null +++ b/include/linux/qda_compute_bus.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#ifndef __QDA_COMPUTE_BUS_H__ +#define __QDA_COMPUTE_BUS_H__ + +#include + +/* + * Custom bus type for QDA compute context bank (CB) devices + * + * This bus type is used for manually created CB devices that represent + * IOMMU context banks. The custom bus allows proper IOMMU configuration + * and device management for these virtual devices. + */ +#ifdef CONFIG_DRM_ACCEL_QDA_COMPUTE_BUS +extern struct bus_type qda_cb_bus_type; +#endif + +#endif /* __QDA_COMPUTE_BUS_H__ */ -- 2.34.1