From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 86D1D39E6D8 for ; Tue, 24 Feb 2026 15:20:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.92.199 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771946440; cv=none; b=a2VpPebHlW5bgJ2l0X1fuvVVEIKaCYNPtiG+w6D0+FWcvUKizKsSsmXkgvQTPEDkzyAyKxCwau+J18ki6glJveIrQudKMJNLiACdQakoTmA/DJWTQZhd47cSZyHEI9BLCQMQTyf46EO1nQofK70ggzPO113nfRbszydCU3O2Gmo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771946440; c=relaxed/simple; bh=MOqMCbgUHrJcjRMSh/jwmeZmxibDzmfslLk3KEsa7eE=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=LymnPgATxH7awFrRLESDfN8RIR4TUep8qDt6bilWSiFaCg4hQyYLWj/haIy4CYrmaHRSAoGvaVXT5B1Hc6kUAxt1/PGakmKeLQrgwmeO4+IboGazdZviGWBUYtUbNcT40aSCc/mvuhiyvz0kHRtfvur/Sb6rnCvfGZvbP+qP44w= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org; spf=none smtp.mailfrom=infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=MSdepvhu; arc=none smtp.client-ip=90.155.92.199 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="MSdepvhu" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=bO9rmuaszq2RFJ7vJc7LjGC/YUAHoJUkZ7/AX73HZqM=; b=MSdepvhuk5+412UmvcqdhRDpH7 x7f7GAz64DIvpTO3HV3+PJ8GY1giahdcM3R6QXyk11EcQkQUVMO1/wLvmNUpnOQMQvXauVmeVm4fJ e/8Xc9qvAvWkhj9e3jBzb2tPLR1jSdSumKVoOa75wqAYRIXh1UwBxxQTOhhvFFAJKa4YNgUhBPhUC blo5zQgUhQrJDarUshzq2Ss/LJ/vi4xY01yfOEM3F0xKDHiyA5U47PW5Zz+HpIB7bplySq/gqourf ggAtOxl9VJe8SOHINX3LtbGs0jxNiB55bTbfzgwmvfDl5rx+dttZVztdvYrnu/56WrLhf31Lpg6fa acO87ONg==; Received: from 77-249-17-252.cable.dynamic.v4.ziggo.nl ([77.249.17.252] helo=noisy.programming.kicks-ass.net) by desiato.infradead.org with esmtpsa (Exim 4.98.2 #2 (Red Hat Linux)) id 1vuuDB-00000007Mh2-3hi7; Tue, 24 Feb 2026 15:20:34 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id 76D62301BD5; Tue, 24 Feb 2026 16:20:32 +0100 (CET) Date: Tue, 24 Feb 2026 16:20:32 +0100 From: Peter Zijlstra To: Heiko Carstens Cc: linux-kernel@vger.kernel.org, Thomas Gleixner , mathieu.desnoyers@efficios.com, Mark Rutland , cmarinas@kernel.org, maddy@linux.ibm.com, ryan.roberts@arm.com Subject: Re: [RFC] in-kernel rseq Message-ID: <20260224152032.GZ1395266@noisy.programming.kicks-ass.net> References: <20260223163843.GR1282955@noisy.programming.kicks-ass.net> <20260224111646.20006Ddc-hca@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260224111646.20006Ddc-hca@linux.ibm.com> On Tue, Feb 24, 2026 at 12:16:46PM +0100, Heiko Carstens wrote: > Let's assume s390 would be target, which also uses atomics for > this_cpu ops. A very simple function like: > > static DEFINE_PER_CPU(long, bar); > > long foo(long val) > { > return this_cpu_add_return(bar, val); > } > > would turn into the below with PREEMPT_NONE: > > 0000000000000000 : > 0: c0 04 00 00 00 00 jgnop 0 > 6: c0 10 00 00 00 00 larl %r1,6 <- r1 contains address of "bar" > 8: R_390_PC32DBL .data..percpu+0x2 > c: a7 39 00 00 lghi %r3,0 > 10: e3 10 33 b8 00 08 ag %r1,952(%r3) <- add per-cpu offset > 16: eb 02 10 00 00 e8 laag %r0,%r2,0(%r1) <- atomic op > 1c: b9 08 00 20 agr %r2,%r0 > 20: 07 fe br %r14 > > With PREEMPT_LAZY this turns into: > > 0000000000000000 : > 0: c0 04 00 00 00 00 jgnop 0 > 6: eb af f0 68 00 24 stmg %r10,%r15,104(%r15) > c: b9 04 00 ef lgr %r14,%r15 > 10: b9 04 00 b2 lgr %r11,%r2 > 14: e3 f0 ff c8 ff 71 lay %r15,-56(%r15) > 1a: e3 e0 f0 98 00 24 stg %r14,152(%r15) <- up to here: create stack frame So some of that could be elided with that asm call thunk thing we talked about yesterday, right? > 20: eb 01 03 a8 00 6a asi 936,1 <- preempt_inc() > 26: c0 10 00 00 00 00 larl %r1,26 > 28: R_390_PC32DBL .data..percpu+0x2 > 2c: a7 29 00 00 lghi %r2,0 > 30: e3 10 23 b8 00 08 ag %r1,952(%r2) > 36: eb ab 10 00 00 e8 laag %r10,%r11,0(%r1) > 3c: eb ff 03 a8 00 6e alsi 936,-1 <- preempt_dec_and_test() > 42: a7 54 00 05 jnhe 4c > 46: c0 e5 00 00 00 00 brasl %r14,46 > 48: R_390_PLT32DBL preempt_schedule_notrace+0x2 > 4c: b9 e8 b0 2a agrk %r2,%r10,%r11 > 50: eb af f0 a0 00 04 lmg %r10,%r15,160(%r15) > 56: 07 fe br %r14 > > With your proposal I guess this would turn into something like below. Note, > the below is hand-edited, therefore offsets etc, do not make any sense, it is > just the instruction sequence I guess we _could_ end up with: > > 0000000000000000 : > 0: c0 04 00 00 00 00 jgnop 0 > larl %r1,#this_seq <- &_RR > stg %r1,944 <- lowcore->sched_seq = &_R; > c: c0 10 00 00 00 00 larl %r1,c > e: R_390_PC32DBL .data..percpu+0x2 > 16: e3 10 33 b8 00 08 ag %r1,952 > 1c: eb 02 10 00 00 e8 laag %r0,%r2,0(%r1) > mvghi 944,0 <- lowcore->sched_seq = NULL; > 2c: b9 08 00 20 agr %r2,%r0 > 30: 07 fe br %r14 > > This uses the s390 specific "lowcore" instead of current for sched_seq, since > it is an architecture per-cpu area mapped at address zero. Right, something like that. This is hopefully 'better' :-)