From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BCA332D8396 for ; Wed, 25 Feb 2026 20:19:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772050763; cv=none; b=fZ35OwGnfcJF1Io3xJbIF75WJ6pLh3WFG/0cUxvyt3kN1aQMQhv28vOZ+MkPgJUKxme3VWycQsA9NZ8T8tLFp4zDW8jFOub4YHQjzHHmRDGLYDvj02410EM3B8I1JHJxCBX9PIrTqvyIBge41dM+/EeJcn/DvXhAyYVG78EeLBs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772050763; c=relaxed/simple; bh=/bIUZxUTLR2i/cpBBU8V8roQsi22X7toUebUWIaM+8A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LLdMMccpCqHUJFpKwXPKTguwj8UC1PrTQLOBVFNBp00IsU9//ZML6JXGh1nY7XcuYjeFoBtsRQGcOmboDxXwLiL4bjWxgTm/jjQ2zMp35ALUNpK87uJC5LB6gbG3p91kZf/yA00HqkGn21cDruX/c3lTIKsEu7hW+fNrsNnNtMM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D858F1756; Wed, 25 Feb 2026 12:19:14 -0800 (PST) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0F15C3F73B; Wed, 25 Feb 2026 12:19:18 -0800 (PST) From: Ben Horgan To: linux-kernel@vger.kernel.org Cc: tony.luck@intel.com, reinette.chatre@intel.com, Dave.Martin@arm.com, james.morse@arm.com, babu.moger@amd.com, tglx@kernel.org, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, ben.horgan@arm.com, fenghuay@nvidia.com, tan.shaopeng@fujitsu.com Subject: [PATCH v1 1/4] x86,fs/resctrl: Make resctrl_arch_is_evt_configurable() aware of mbm_assign_mode Date: Wed, 25 Feb 2026 20:19:02 +0000 Message-ID: <20260225201905.3568624-2-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260225201905.3568624-1-ben.horgan@arm.com> References: <20260225201905.3568624-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The features BMEC and ABMC provide separate interfaces to configuring which bandwidth types a counter tracks. Currently resctrl_arch_is_evt_configurable() only ever returns true if BMEC is supported. ABMC is useful even when BMEC is supported as it also provides counter assignment which reduces the number of hardware monitors a system requires. It is an architectural detail that ABMC provides counter configurability without requiring the prior feature, BMEC. On MPAM systems these two features are independent and the bandwidth types are limited to a choice of only read or write. In order to give resctrl the information to support these features independently extend resctrl_arch_is_evt_configurable() to report whether events are configurable when using the mbm_event counter assignment mode. Signed-off-by: Ben Horgan --- arch/x86/kernel/cpu/resctrl/core.c | 12 ++++++++++-- fs/resctrl/monitor.c | 4 ++-- include/linux/resctrl.h | 2 +- 3 files changed, 13 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 7667cf7c4e94..d35f4417d55e 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -877,11 +877,19 @@ bool rdt_cpu_has(int flag) return ret; } -bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt) +bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt, bool assignable) { - if (!rdt_cpu_has(X86_FEATURE_BMEC)) + if (!assignable && !rdt_cpu_has(X86_FEATURE_BMEC)) return false; + if (assignable && !rdt_cpu_has(X86_FEATURE_ABMC)) + return false; + + /* + * When ABMC is used the mbm_local and mbm_total events are enabled + * based on the equivalently named cpu features. (In order to allow + * fallback to the default counter assignment mode). + */ switch (evt) { case QOS_L3_MBM_TOTAL_EVENT_ID: return rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL); diff --git a/fs/resctrl/monitor.c b/fs/resctrl/monitor.c index 49f3f6b846b2..d25622ee22c5 100644 --- a/fs/resctrl/monitor.c +++ b/fs/resctrl/monitor.c @@ -1854,12 +1854,12 @@ int resctrl_l3_mon_resource_init(void) if (ret) return ret; - if (resctrl_arch_is_evt_configurable(QOS_L3_MBM_TOTAL_EVENT_ID)) { + if (resctrl_arch_is_evt_configurable(QOS_L3_MBM_TOTAL_EVENT_ID, false)) { mon_event_all[QOS_L3_MBM_TOTAL_EVENT_ID].configurable = true; resctrl_file_fflags_init("mbm_total_bytes_config", RFTYPE_MON_INFO | RFTYPE_RES_CACHE); } - if (resctrl_arch_is_evt_configurable(QOS_L3_MBM_LOCAL_EVENT_ID)) { + if (resctrl_arch_is_evt_configurable(QOS_L3_MBM_LOCAL_EVENT_ID, false)) { mon_event_all[QOS_L3_MBM_LOCAL_EVENT_ID].configurable = true; resctrl_file_fflags_init("mbm_local_bytes_config", RFTYPE_MON_INFO | RFTYPE_RES_CACHE); diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 006e57fd7ca5..9ac1fe76bff4 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -419,7 +419,7 @@ bool resctrl_enable_mon_event(enum resctrl_event_id eventid, bool any_cpu, bool resctrl_is_mon_event_enabled(enum resctrl_event_id eventid); -bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt); +bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt, bool assignable); static inline bool resctrl_is_mbm_event(enum resctrl_event_id eventid) { -- 2.43.0