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Larsen" Subject: [PATCH v3 0/3] iommu/amd: Invalidate IRT cache for DMA aliases Date: Wed, 25 Feb 2026 21:23:27 +0100 Message-ID: <20260225202330.23027-1-magnus@dolphinics.com> X-Mailer: git-send-email 2.43.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: OS6P279CA0111.NORP279.PROD.OUTLOOK.COM (2603:10a6:e10:3c::13) To OLAP279MB0055.NORP279.PROD.OUTLOOK.COM (2603:10a6:e10:2::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OLAP279MB0055:EE_|OS5P279MB1039:EE_ X-MS-Office365-Filtering-Correlation-Id: f71435df-3401-4fe7-c41f-08de74abc3b2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|376014|366016; X-Microsoft-Antispam-Message-Info: 3vDTuDHLBwUla5RPhHCZch5YylALJKYqIYnvx+xoAl80NmyoAJmTmgCqpRYfyD9LvVtrKRGLb+xBpgzb9n6vlDAzpoKaxHZ246qv7PTi0HRMTkaaXKPPT8moCPnCMaXAno/rphpKeavE9ZnYbZb5hPsDEDxJsKlpXwLpTyY9oXFgWgMllPfvlj0ZQJ7ZCyLtvBJt0F2Pw1D1bHzICopMrvgu6geUQZlQpP6sVBoA7mSfBSQiWi9WtJFucwoKU179vNFIt7fZXVfCZS6Rff84XLa57ymvEvJqsHAT3Fgv98VjCDJoH1KJrxIzs7amR+aT4GDvitFr1vLNDIBwQJG5GEHN7cTqkgeWHmDGd5yTi180aJN3VIWR2JjjHdLbLsZ9u6LJEMP5pAjwQReYarHPugrabzbZdviMCCBaM4Fb76wSX2Jfq6zh9XlMzGN2ZrpZXWgGBs1nuz6ZWi2C5zXJmvO/gjMzScYIZxBWxCu3UpYNjUez/9EPZaQ2ErPXY6xXoDNWihQ0YOYLCqz5qVabESEputs6CMunOYF/bDUZxHGeGYLfe3Hc3JWUsAyd5nF2Xek8ICykkGsDBs3Gfgrfm/0ojDT26C/3FonaFpnITYI6QjAWkx+tlTus0J6uqlxhMS5DSypHYI9OdcVfVWTASQYUIo7oISVm/PQxzQKSWPlpVW8kTfpHHOoiTUgEod6rbeVja+aCbUn2RQBbtTTiHEvk9s0jooYFtMXh6kiq10w= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:OLAP279MB0055.NORP279.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(10070799003)(376014)(366016);DIR:OUT;SFP:1102; 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See commit 3c124435e8dd ("iommu/amd: Support multiple PCI DMA aliases in IRQ Remapping") for more information on this. However, the AMD IOMMU driver currently invalidates IRTE cache entries on a per-device basis whenever an IRTE is updated, not for each alias. This approach leaves stale IRTE cache entries when an IRTE is cached under one DMA alias but later updated and invalidated through a different alias. In such cases, the original device ID is never invalidated, since it is programmed via aliasing. This incoherency bug has been observed when IRTEs are cached for one Non-Transparent Bridge (NTB) DMA alias, later updated via another. Fix this by invalidating the interrupt remapping table cache for all DMA aliases when updating an IRTE. Changes since v2: - Look for aliases with pci_seg->alias_table instead of pci_for_each_dma_alias since we can't get the pdev (lockdep). Track the aliases in set_remap_table_entry_alias. Invalidate IRT cache for each BDF sharing alias with the given devid in iommu_flush_irt_and_complete. - Make iommu_table_lock a raw spinlock to use it when invalidating IRT caches. - Rebased and applied cleanly on the IOMMU development tree Co-developed-by: Lars B. Kristiansen Signed-off-by: Lars B. Kristiansen Co-developed-by: Jonas Markussen Signed-off-by: Jonas Markussen Co-developed-by: Tore H. Larsen Signed-off-by: Tore H. Larsen Signed-off-by: Magnus Kalland Link: https://lore.kernel.org/linux-iommu/26cfa307-6c33-41f9-a7a0-fbf202b38a00@amd.com/ Magnus Kalland (3): iommu/amd: Use raw spinlock for interrupt remapping tables iommu/amd: Track PCIe DMA aliases in set_remap_table_entry_alias iommu/amd: Invalidate IRT cache for DMA aliases drivers/iommu/amd/iommu.c | 52 +++++++++++++++++++++++++++++++++------ 1 file changed, 45 insertions(+), 7 deletions(-) -- 2.43.0