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[142.162.112.119]) by smtp.gmail.com with ESMTPSA id af79cd13be357-8cbbf6f926csm481207985a.32.2026.02.27.06.03.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 06:03:30 -0800 (PST) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1vvyRF-00000000vQL-1Fdb; Fri, 27 Feb 2026 10:03:29 -0400 Date: Fri, 27 Feb 2026 10:03:29 -0400 From: Jason Gunthorpe To: Antheas Kapenekakis Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Joerg Roedel , Will Deacon , Robin Murphy , Vasant Hegde , Alejandro Jimenez , dnaim@cachyos.org, Mario.Limonciello@amd.com Subject: Re: [PATCH v3] iommu: Fix mapping check for 0x0 to avoid re-mapping it Message-ID: <20260227140329.GI44359@ziepe.ca> References: <20260227080638.208693-1-lkml@antheas.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260227080638.208693-1-lkml@antheas.dev> On Fri, Feb 27, 2026 at 09:06:37AM +0100, Antheas Kapenekakis wrote: > Commit 789a5913b29c ("iommu/amd: Use the generic iommu page table") > introduces the shared iommu page table for AMD IOMMU. Some bioses > contain an identity mapping for address 0x0, which is not parsed > properly (e.g., certain Strix Halo devices). This causes the DMA > components of the device to fail to initialize (e.g., the NVMe SSD > controller), leading to a failed post. > > Specifically, on the GPD Win 5, the NVME and SSD GPU fail to mount, > making collecting errors difficult. While debugging, it was found that > a -EADDRINUSE error was emitted and its source was traced to > iommu_iova_to_phys(). After adding some debug prints, it was found that > phys_addr becomes 0, which causes the code to try to re-map the 0 > address and fail, causing a cascade leading to a failed post. This is > because the GPD Win 5 contains a 0x0-0x1 identity mapping for DMA > devices, causing it to be repeated for each device. > > The cause of this failure is the following check in > iommu_create_device_direct_mappings(), where address aliasing is handled > via the following check: > > ``` > phys_addr = iommu_iova_to_phys(domain, addr); > if (!phys_addr) { > map_size += pg_size; > continue; > } > ```` > > Obviously, the iommu_iova_to_phys() signature is faulty and aliases > unmapped and 0 together, causing the allocation code to try to > re-allocate the 0 address per device. However, it has too many > instantiations to fix. Therefore, use a ternary so that when addr > is 0, the check is done for address 1 instead. > > Suggested-by: Robin Murphy > Fixes: 789a5913b29c ("iommu/amd: Use the generic iommu page table") > Signed-off-by: Antheas Kapenekakis > > --- Reviewed-by: Jason Gunthorpe Jason