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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Woojung Huh , Russell King , Steen Hegelund , Daniel Machon , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH net-next 2/8] dt-bindings: net: lan9645x: add LAN9645X switch bindings Message-ID: <20260304161457.l6tkxix6sgube3qc@skbuf> References: <20260303-dsa_lan9645x_switch_driver_base-v1-0-bff8ca1396f5@microchip.com> <20260303-dsa_lan9645x_switch_driver_base-v1-2-bff8ca1396f5@microchip.com> <20260303-disperser-clone-512efa99f26c@spud> <65fd5f46f1f996dd5f4df2de2efb52c8fa3575b3.camel@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <65fd5f46f1f996dd5f4df2de2efb52c8fa3575b3.camel@microchip.com> On Wed, Mar 04, 2026 at 05:10:11PM +0100, Jens Emil Schulz Ostergaard wrote: > On Tue, 2026-03-03 at 18:56 +0000, Conor Dooley wrote: > > On Tue, Mar 03, 2026 at 01:22:28PM +0100, Jens Emil Schulz Østergaard wrote: > > > +examples: > > > + - | > > > + soc { > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + > > > + ethernet-switch@0 { > > > + reg = <0>; > > > > Also, this is an odd example, why are you at address 0 on a "soc" bus, > > which usually means that this device on an AXI/AHB bus, and 0 is very > > unusual for that. Obviously the example doesn't have to match the real > > user, but this stands out. > > I may have some follow up questions I think depending on your answer. > > The intended way to bind this driver is via a parent MFD driver which sets > up the SPI register protocol, initiates regmaps and distributes them to child > devices (like this DSA driver). > > Similar to mscc,vsc7512 in drivers/mfd/ocelot-spi.c. > > This MFD would be the soc node. All child nodes perform register IO over > spi, using the regmaps requested from this parent so I think the addresses > on the bus are purely ornamental. Should I write the smallest register > address in all regions used by the DSA driver instead? They are not ornamental, they should be the same addresses you'd put if Linux had direct access to the SoC interconnect for MMIO, rather than to an SPI bridge to the SoC interconnect. Or at least I don't see why it wouldn't be that way.