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[142.162.112.119]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-899fdf30e99sm69421516d6.3.2026.03.04.08.45.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Mar 2026 08:45:52 -0800 (PST) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1vxpM7-00000005CBf-1l90; Wed, 04 Mar 2026 12:45:51 -0400 Date: Wed, 4 Mar 2026 12:45:51 -0400 From: Jason Gunthorpe To: Leon Romanovsky Cc: Danilo Krummrich , Peter Colberg , Bjorn Helgaas , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Miguel Ojeda , Alex Gaynor , Gary Guo , =?utf-8?B?QmrDtnJu?= Roy Baron , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Abdiel Janulgue , Daniel Almeida , Robin Murphy , Greg Kroah-Hartman , Dave Ertman , Ira Weiny , David Airlie , Simona Vetter , Jonathan Corbet , Xu Yilun , Tom Rix , Moritz Fischer , "Rafael J. Wysocki" , Boqun Feng , linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, Alexandre Courbot , Alistair Popple , Joel Fernandes , John Hubbard , Zhi Wang , nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-doc@vger.kernel.org, linux-fpga@vger.kernel.org, driver-core@lists.linux.dev Subject: Re: [PATCH v3 00/10] rust: pci: add abstractions for SR-IOV capability Message-ID: <20260304164551.GG964116@ziepe.ca> References: <20260303-rust-pci-sriov-v3-0-4443c35f0c88@redhat.com> <20260304084750.GW12611@unreal> <20260304141852.GF964116@ziepe.ca> <20260304142600.GB12611@unreal> <20260304162711.GI12611@unreal> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260304162711.GI12611@unreal> On Wed, Mar 04, 2026 at 06:27:11PM +0200, Leon Romanovsky wrote: > On Wed, Mar 04, 2026 at 03:57:57PM +0100, Danilo Krummrich wrote: > > On Wed Mar 4, 2026 at 3:26 PM CET, Leon Romanovsky wrote: > > > On Wed, Mar 04, 2026 at 10:18:52AM -0400, Jason Gunthorpe wrote: > > >> On Wed, Mar 04, 2026 at 10:47:50AM +0200, Leon Romanovsky wrote: > > >> > On Tue, Mar 03, 2026 at 04:15:20PM -0500, Peter Colberg wrote: > > >> > > Add Rust abstractions for the Single Root I/O Virtualization (SR-IOV) > > >> > > capability of a PCI device. Provide a minimal set of wrappers for the > > >> > > SR-IOV C API to enable and disable SR-IOV for a device, and query if > > >> > > a PCI device is a Physical Function (PF) or Virtual Function (VF). > > >> > > > >> > <...> > > >> > > > >> > > For PF drivers written in C, disabling SR-IOV on remove() may be opted > > >> > > into by setting the flag managed_sriov in the pci_driver structure. For > > >> > > PF drivers written in Rust, disabling SR-IOV on unbind() is mandatory. > > >> > > > >> > Why? Could you explain the rationale behind this difference between C and > > >> > Rust? Let me remind you that SR‑IOV devices which do not disable VFs do so > > >> > for a practical and well‑established reason: maximizing hardware > > >> > utilization. > > >> > > >> Personally I think drivers doing this are wrong. That such a driver > > >> bug was allowed to become UAPI is pretty bad. The rust approach is > > >> better. > > > > > > We already had this discussion. I see this as a perfectly valid > > > use-case. > > > > Can you remind about a specific use-case for this please? (Ideally, one that > > can't be solved otherwise.) > > You create X VFs through sriov_configure, unbind PF, bind it to vfio > instead and forward (X + 1) functions to different VMs. No, illegal, and it doesn't even work right. When VFIO FLRs the PF it will blow up the half baked SRIOV and break everything. VFIO already has its own sriov_config support, the right flow is to bind the PF to VFIO and then enable sriov and do your assignments. Jason