From: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Alim Akhtar <alim.akhtar@samsung.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Subject: [PATCH 2/5] arm64: dts: exynos8895: Move I2C address/size-cells to DTSI
Date: Thu, 05 Mar 2026 10:09:25 +0100 [thread overview]
Message-ID: <20260305-dts-exynos-i2c-v1-2-2c8d3df3b9ca@oss.qualcomm.com> (raw)
In-Reply-To: <20260305-dts-exynos-i2c-v1-0-2c8d3df3b9ca@oss.qualcomm.com>
Convention followed in all other DTSI files is to define I2C controller
address/size-cells in the DTSI thus reducing code needed in each DTS.
It's also logical, since I2C is a bus and needs definition of addressing
children, even if the bus is enabled without the nodes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts | 2 -
arch/arm64/boot/dts/exynos/exynos8895.dtsi | 128 +++++++++++++++++++++
2 files changed, 128 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts b/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts
index 61e064af3337..305dc72f93d8 100644
--- a/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts
+++ b/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts
@@ -103,8 +103,6 @@ reg_placeholder: regulator-0 {
};
&hsi2c_23 {
- #address-cells = <1>;
- #size-cells = <0>;
status = "okay";
touchscreen@48 {
diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
index f92d2a8a20a2..ff114cd6c9ea 100644
--- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
@@ -266,6 +266,10 @@ hsi2c_5: i2c@0 {
interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c5_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -305,6 +309,10 @@ hsi2c_6: i2c@10000 {
interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c6_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -328,6 +336,10 @@ hsi2c_7: i2c@0 {
interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c5_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -367,6 +379,10 @@ hsi2c_8: i2c@10000 {
interrupts = <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c8_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -390,6 +406,10 @@ hsi2c_9: i2c@0 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c9_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -429,6 +449,10 @@ hsi2c_10: i2c@10000 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c10_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -452,6 +476,10 @@ hsi2c_11: i2c@0 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c11_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -491,6 +519,10 @@ hsi2c_12: i2c@10000 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c12_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -565,6 +597,10 @@ hsi2c_13: i2c@0 {
interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c13_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -604,6 +640,10 @@ hsi2c_14: i2c@10000 {
interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c14_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -627,6 +667,10 @@ hsi2c_15: i2c@0 {
interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c15_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -666,6 +710,10 @@ hsi2c_16: i2c@10000 {
interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c16_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -689,6 +737,10 @@ hsi2c_17: i2c@0 {
interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c17_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -728,6 +780,10 @@ hsi2c_18: i2c@10000 {
interrupts = <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c18_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -751,6 +807,10 @@ hsi2c_19: i2c@0 {
interrupts = <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c19_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -790,6 +850,10 @@ hsi2c_20: i2c@10000 {
interrupts = <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c20_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -813,6 +877,10 @@ hsi2c_21: i2c@0 {
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c21_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -852,6 +920,10 @@ hsi2c_22: i2c@10000 {
interrupts = <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c22_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -875,6 +947,10 @@ hsi2c_23: i2c@0 {
interrupts = <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c23_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -914,6 +990,10 @@ hsi2c_24: i2c@10000 {
interrupts = <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c24_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -937,6 +1017,10 @@ hsi2c_25: i2c@0 {
interrupts = <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c25_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -976,6 +1060,10 @@ hsi2c_26: i2c@10000 {
interrupts = <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c26_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -999,6 +1087,10 @@ hsi2c_27: i2c@0 {
interrupts = <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c27_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -1038,6 +1130,10 @@ hsi2c_28: i2c@10000 {
interrupts = <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c28_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -1061,6 +1157,10 @@ hsi2c_29: i2c@0 {
interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c29_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -1100,6 +1200,10 @@ hsi2c_30: i2c@10000 {
interrupts = <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c30_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -1123,6 +1227,10 @@ hsi2c_31: i2c@0 {
interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c31_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -1162,6 +1270,10 @@ hsi2c_32: i2c@10000 {
interrupts = <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c32_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
};
@@ -1180,6 +1292,10 @@ hsi2c_1: i2c@10990000 {
interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c1_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -1191,6 +1307,10 @@ hsi2c_2: i2c@109a0000 {
interrupts = <GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c2_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -1202,6 +1322,10 @@ hsi2c_3: i2c@109b0000 {
interrupts = <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c3_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
@@ -1213,6 +1337,10 @@ hsi2c_4: i2c@109c0000 {
interrupts = <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&hsi2c4_bus>;
pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
};
--
2.51.0
next prev parent reply other threads:[~2026-03-05 9:09 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-05 9:09 [PATCH 0/5] ARM: dts: exynos: Cleanup I2C address-cells and size-cells Krzysztof Kozlowski
2026-03-05 9:09 ` [PATCH 1/5] arm64: dts: exynos7870: Move I2C address/size-cells to DTSI Krzysztof Kozlowski
2026-03-05 9:09 ` Krzysztof Kozlowski [this message]
2026-03-05 9:09 ` [PATCH 3/5] ARM: dts: exynos3250: Drop duplicated I2C address/size-cells Krzysztof Kozlowski
2026-03-05 9:09 ` [PATCH 4/5] ARM: dts: exynos4210-smdkv310: " Krzysztof Kozlowski
2026-03-05 9:09 ` [PATCH 5/5] ARM: dts: exyons4412: " Krzysztof Kozlowski
2026-03-10 16:04 ` (subset) [PATCH 0/5] ARM: dts: exynos: Cleanup I2C address-cells and size-cells Krzysztof Kozlowski
2026-03-10 16:04 ` Krzysztof Kozlowski
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