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Peter Anvin" , Ingo Molnar , Jon Kohler , "Peter Zijlstra (Intel)" , Thomas Gleixner , Tony Luck , x86@kernel.org Subject: Re: [PATCH v4 1/4] x86/microcode: Refactor platform ID enumeration into a helper Message-ID: <20260305013853.3riphxey733tokly@desk> References: <20260304181016.85EC87C7@davehans-spike.ostc.intel.com> <20260304181018.EB6404F8@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260304181018.EB6404F8@davehans-spike.ostc.intel.com> On Wed, Mar 04, 2026 at 10:10:18AM -0800, Dave Hansen wrote: > > From: Dave Hansen > > Today, the only code that cares about the platform ID is the microcode > update code itself. To facilitate storing the platform ID in a more > generic place and using it outside of the microcode update itself, put > the enumeration into a helper function. Mirror > intel_get_microcode_revision()'s naming and location. > > But, moving away from intel_collect_cpu_info() means that the model > and family information in CPUID is not readily available. Just call > CPUID again. > > Note that the microcode header is a mask of supported platform IDs. > Only stick the ID part in the helper. Leave the 1< microcode handling. > > Also note that the PII is weird. It does not really have a platform > ID because it doesn't even have the MSR. Just consider it to be > platform ID 0. Instead of saying >=PII, say <=PII. The PII is the ^ I think you meant PIII here? > real oddball here being the only CPU with Linux microcode updates > but no platform ID. It's worth calling it out by name. > > This does subtly change the sig->pf for the PII though from 0x0 > to 0x1. Make up for that by ignoring sig->pf when the microcode > update platform mask is 0x0. > > Signed-off-by: Dave Hansen > Reviewed-by: Sohil Mehta > Cc: Thomas Gleixner > Cc: Ingo Molnar > Cc: Borislav Petkov > Cc: Dave Hansen > Cc: "H. Peter Anvin" > Cc: Tony Luck > Cc: Pawan Gupta > Cc: "Peter Zijlstra (Intel)" > Cc: x86@kernel.org > Cc: Jon Kohler > > -- > > Changes from v3: > * Handle the empty platform mask on the PII > > --- > > b/arch/x86/kernel/cpu/microcode/intel.c | 53 +++++++++++++++++++++++++------- > 1 file changed, 42 insertions(+), 11 deletions(-) > > diff -puN arch/x86/kernel/cpu/microcode/intel.c~refactor-get-processor-flags arch/x86/kernel/cpu/microcode/intel.c > --- a/arch/x86/kernel/cpu/microcode/intel.c~refactor-get-processor-flags 2026-03-04 09:19:02.438748485 -0800 > +++ b/arch/x86/kernel/cpu/microcode/intel.c 2026-03-04 09:19:02.441748599 -0800 > @@ -120,19 +120,43 @@ static inline unsigned int exttable_size > return et->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE; > } > > +/* > + * Use CPUID to generate a "vfm" value. Useful > + * before 'cpuinfo_x86' structures are populated. > + */ > +static u32 intel_cpuid_vfm(void) > +{ > + u32 eax = cpuid_eax(1); > + u32 fam = x86_family(eax); > + u32 model = x86_model(eax); Nit, is s/eax/sig/ more clear? u32 sig = cpuid_eax(1); u32 fam = x86_family(sig); u32 model = x86_model(sig); Reviewed-by: Pawan Gupta